[PATCH RFC 03/24] arm64/dts: add switch-delay for meson mali

Qiang Yu yuq825 at gmail.com
Sat May 19 06:52:22 UTC 2018


Meson mali GPU operate in high clock frequency, need
this value be high to work in a stable state.

Signed-off-by: Qiang Yu <yuq825 at gmail.com>
---
 arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
index eb327664a4d8..8bed15267c9c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi
@@ -23,6 +23,7 @@
 			"pp2", "ppmmu2";
 		clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
 		clock-names = "bus", "core";
+		switch-delay = <0xffff>;
 
 		/*
 		 * Mali clocking is provided by two identical clock paths
-- 
2.17.0



More information about the dri-devel mailing list