[Bug 106597] [vga_switcheroo] commit 07f4f97d7b4bf325d9f558c5b58230387e4e57e0 breaks dpm on Alienware 15R3

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Thu May 24 08:56:44 UTC 2018


--- Comment #21 from Lukas Wunner <lukas at wunner.de> ---
Okay so the reason the HDA controller doesn't suspend is because the
codec_powered bitmask is not null:

snd_hda_intel 0000:01:00.1: azx_runtime_idle: !power_save_controller = 0,
!azx_has_pm_runtime(chip) = 0, azx_bus(chip)->codec_powered = 0x1,
!chip->running = 0

The lowest bit is set. In other words, the single codec on that HDA bus is
considered powered on, so the HDA controller is prevented from suspending.

Bits in the codec_powered bitmask are set or cleared using
snd_hdac_codec_link_up() and snd_hdac_codec_link_down(), which are only called
during runtime suspend and resume of the codec.

Looking at hda_codec_runtime_suspend(), we can see that the bit is only cleared


        if (codec_has_clkstop(codec) && codec_has_epss(codec) &&
            (state & AC_PWRST_CLK_STOP_OK))

The codec_has_clkstop() and codec_has_epss() macros just query bits in the
power_caps bitmask. That bitmask can also be retrieved from sysfs, could you
please post the output of:
grep . /sys/bus/hdaudio/devices/hdaudioC1D0/widgets/*/power_caps

I'll prepare another debug patch so that we get a better understanding why the
codec isn't powered down.

We've either got a bug in the HDA code here or we're missing a quirk for this
specific HDA controller. Sooner or later we'll have to pull in Takashi Iwai
(hda maintainer) and/or AMD engineers responsible for the HDA portion of their

Previously we just papered over such issues by forcing the HDA controller off
when the GPU runtime suspends, but since my commit 07f4f97d7b4b such bugs are
now exposed as we deliberately keep the GPU awake as long as the HDA controller
is in use. Thanks for helping identify and tracking down this issue.

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