[PATCH] drm: rcar-du: Fix external clock error checks
Kieran Bingham
kieran.bingham+renesas at ideasonboard.com
Tue Nov 6 21:47:47 UTC 2018
Hi Laurent,
Thank you for the patch,
On 06/11/2018 15:39, Laurent Pinchart wrote:
> The rcar-du driver supports probe deferral for external clocks, but
> implements it badly by checking the wrong pointer due to a bad copy and
> paste. Fix it.
>
> While at it, reject invalid clocks outright for DU channels that have a
> display PLL, as the external clock is mandatory in that case. This
> avoids a WARN_ON() at runtime.
>
> Fixes: 1b30dbde8596 ("drm: rcar-du: Add support for external pixel clock")
> Reported-by: Kuninori Morimoto <kuninori.morimoto.gx at renesas.com>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas at ideasonboard.com>
This looks good to me:
Reviewed-by: Kieran Bingham <kieran.bingham+renesas at ideasonboard.com>
> ---
> drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> index d18a342626b5..79021d7aa3ce 100644
> --- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> +++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
> @@ -226,9 +226,6 @@ static void rcar_du_crtc_set_display_timing(struct rcar_du_crtc *rcrtc)
> * system clock, and have no internal clock divider.
> */
>
> - if (WARN_ON(!rcrtc->extclock))
> - return;
> -
> /*
> * The H3 ES1.x exhibits dot clock duty cycle stability issues.
> * We can work around them by configuring the DPLL to twice the
> @@ -1113,9 +1110,16 @@ int rcar_du_crtc_create(struct rcar_du_group *rgrp, unsigned int swindex,
> clk = devm_clk_get(rcdu->dev, clk_name);
> if (!IS_ERR(clk)) {
> rcrtc->extclock = clk;
> - } else if (PTR_ERR(rcrtc->clock) == -EPROBE_DEFER) {
> - dev_info(rcdu->dev, "can't get external clock %u\n", hwindex);
> + } else if (PTR_ERR(clk) == -EPROBE_DEFER) {
> return -EPROBE_DEFER;
> + } else if (rcdu->info->dpll_mask & BIT(hwindex)) {
> + /*
> + * DU channels that have a display PLL can't use the internal
> + * system clock and thus require an external clock.
> + */
> + ret = PTR_ERR(clk);
> + dev_err(rcdu->dev, "can't get dclkin.%u: %d\n", hwindex, ret);
> + return ret;
> }
>
> init_waitqueue_head(&rcrtc->flip_wait);
>
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