[PATCH] drm: dsi: Add lane clock rate fields to DSI device

[Linus Walleij]

The DSI devices have a maximum operating frequency specified
in their data sheet per the MIPI specification, and DSI hosts
that can scale their frequency need this information to set
their clock dividers right.

As current panel drivers often lack this information, specify
that setting it to zero will make the DSI host use some
reasonable default.

Cc: Andrzej Hajda <a.hajda at samsung.com>
Signed-off-by: Linus Walleij <linus.walleij at linaro.org>
---
 include/drm/drm_mipi_dsi.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 4fef19064b0f..a57105776e08 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -168,6 +168,10 @@ struct mipi_dsi_device_info {
  * @format: pixel format for video mode
  * @lanes: number of active data lanes
  * @mode_flags: DSI operation mode related flags
+ * @hs_rate_hz: Maximum lane frequency for high speed operation, if zero
+ * the driver can assume some safe default
+ * @lp_rate_hz: Maximum lane frequency for low power operation, if zero
+ * the driver can assume some safe default
  */
 struct mipi_dsi_device {
 	struct mipi_dsi_host *host;
@@ -178,6 +182,8 @@ struct mipi_dsi_device {
 	unsigned int lanes;
 	enum mipi_dsi_pixel_format format;
 	unsigned long mode_flags;
+	unsigned long hs_rate_hz;
+	unsigned long lp_rate_hz;
 };
 
 #define MIPI_DSI_MODULE_PREFIX "mipi-dsi:"
-- 
2.17.2