[PULL] drm-intel-next
Joonas Lahtinen
joonas.lahtinen at linux.intel.com
Fri Sep 7 10:54:46 UTC 2018
Hi Dave,
Here's the first batch of changes for v4.20. Nothing too special.
Notable things are more Icelake enabling/fixing patches and PPGTT
enabling for some older platforms. Icelake is still behind
alpha_support flag as we have the code in upstream but extensive
testing is pending hardware availability.
Now, after summer vacations are over, next kernel versions will
probably absorb the queue of features that are in the flight.
Note the backmerge of drm-next-4.19. I also intend to backmerge
-rc2 after this for the BITS_PER_TYPE patches that Chris wants.
There are some extra tags generated, just ignore those, Tooling
should handle this pull just nicely.
Regards, Joonas
---
drm-intel-next-2018-09-06-2:
Merge tag 'gvt-next-2018-09-04'
drm-intel-next-2018-09-06-1:
UAPI Changes:
- GGTT coherency GETPARAM: GGTT has turned out to be non-coherent for some
platforms, which we've failed to communicate to userspace so far. SNA was
modified to do extra flushing on non-coherent GGTT access, while Mesa will
mitigate by always requiring WC mapping (which is non-coherent anyway).
- Neuter Resource Streamer uAPI: There never really were users for the feature,
so neuter it while keeping the interface bits for compatibility. This is a
long due item from past.
Cross-subsystem Changes:
- Backmerge of branch drm-next-4.19 for DP_DPCD_REV_14 changes
Core Changes:
- None
Driver Changes:
- A load of Icelake (ICL) enabling patches (Paulo, Manasi)
- Enabled full PPGTT for IVB,VLV and HSW (Chris)
- Bugzilla #107113: Distribute DDB based on display resolutions (Mahesh)
- Bugzillas #100023,#107476,#94921: Support limited range DP displays (Jani)
- Bugzilla #107503: Increase LSPCON timeout (Fredrik)
- Avoid boosting GPU due to an occasional stall in interactive workloads (Chris)
- Apply GGTT coherency W/A only for affected systems instead of all (Chris)
- Fix for infinite link training loop for faulty USB-C MST hubs (Nathan)
- Keep KMS functional on Gen4 and earlier when GPU is wedged (Chris)
- Stop holding ppGTT reference from closed VMAs (Chris)
- Clear error registers after error capture (Lionel)
- Various Icelake fixes (Anusha, Jyoti, Ville, Tvrtko)
- Add missing Coffeelake (CFL) PCI IDs (Rodrigo)
- Flush execlists tasklet directly from reset-finish (Chris)
- Fix LPE audio runtime PM (Chris)
- Fix detection of out of range surface positions (GLK/CNL) (Ville)
- Remove wait-for-idle for PSR2 (Dhinakaran)
- Power down existing display hardware resources when display is disabled (Chris)
- Don't allow runtime power management if RC6 doesn't exist (Chris)
- Add debugging checks for runtime power management paths (Imre)
- Increase symmetry in display power init/fini paths (Imre)
- Isolate GVT specific macros from i915_reg.h (Lucas)
- Increase symmetry in power management enable/disable paths (Chris)
- Increase IP disable timeout to 100 ms to avoid DRM_ERROR (Imre)
- Fix memory leak from HDMI HDCP write function (Brian, Rodrigo)
- Reject Y/Yf tiling on interlaced modes (Ville)
- Use a cached mapping for the physical HWS on older gens (Chris)
- Force slow path of writing relocations to buffer if unable to write to userspace (Chris)
- Do a full device reset after being wedged (Chris)
- Keep forcewake counts over reset (in case of debugfs user) (Imre, Chris)
- Avoid false-positive errors from power wells during init (Imre)
- Reset engines forcibly in exchange of declaring whole device wedged (Mika)
- Reduce context HW ID lifetime in preparation for Icelake (Chris)
- Attempt to recover from module load failures (Chris)
- Keep select interrupts over a reset to avoid missing/losing them (Chris)
- GuC submission backend improvements (Jakub)
- Terminate context images with BB_END (Chris, Lionel)
- Make GCC evaluate GGTT view struct size assertions again (Ville)
- Add selftest to exercise suspend/hibernate code-paths for GEM (Chris)
- Use a full emulation of a user ppgtt context in selftests (Chris)
- Exercise resetting in the middle of a wait-on-fence in selftests (Chris)
- Fix coherency issues on selftests for Baytrail (Chris)
- Various other GEM fixes / self-test updates (Chris, Matt)
- GuC doorbell self-tests (Daniele)
- PSR mode control through debugfs for IGTs (Maarten)
- Degrade expected WM latency errors to DRM_DEBUG_KMS (Chris)
- Cope with errors better in MST link training (Dhinakaran)
- Fix WARN on KBL external displays (Azhar)
- Power well code cleanups (Imre)
- Fixes to PSR debugging (Dhinakaran)
- Make forcewake errors louder for easier catching in CI (WARNs) (Chris)
- Fortify tiling code against programmer errors (Chris)
- Bunch of fixes for CI exposed corner cases (multiple authors, mostly Chris)
The following changes since commit 500775074f88d9cf5416bed2ca19592812d62c41:
Merge branch 'drm-next-4.19' of git://people.freedesktop.org/~agd5f/linux into drm-next (2018-07-20 14:54:31 +1000)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2018-09-06-2
for you to fetch changes up to a28957b8f10be714f076fb3981a3b1a0318c48c2:
drm/i915: Update DRIVER_DATE to 20180906 (2018-09-06 16:54:43 +0300)
----------------------------------------------------------------
Merge tag 'gvt-next-2018-09-04'
----------------------------------------------------------------
Animesh Manna (1):
drm/i915/icl: Update FIA supported lane count for hpd.
Anusha Srivatsa (4):
drm/i915/dsc: Add missing _MMIO() from PPS registers
drm/i915/icl: Add TBT checks for PLL calculations
drm/i915/icl: Set TBT IO in Aux transaction
drm/i915: Do not redefine the has_csr parameter.
Azhar Shaikh (2):
drm/i915: Fix assert_plane() warning on bootup with external display
drm/i915/psr: Add PSR mode/revision to debugfs
Chris Wilson (68):
drm/i915/gtt: Enable full-ppgtt by default everywhere
drm/i915/gtt: Full ppgtt everywhere, no excuses
drm/i915: Suppress assertion for i915_ggtt_disable_guc
drm/i915: Only force GGTT coherency w/a on required chipsets
drm/i915: Pull unpin map into vma release
drm/i915: Show stack (by WARN) for hitting forcewake errors
drm/i915: Skip repeated calls to i915_gem_set_wedged()
drm/i915: Avoid computing tile_row_size() for untiled objects
drm/i915: Mark up object tiling-and-stride getters as const
drm/i915: Protect guc_fini_wq() against module load abort
drm/i915: Restore sane defaults for KMS on GEM error load
drm/i915: Don't disable the GPU for older gen on wedging
drm/i915/selftests: Use a full emulation of a user ppgtt context
drm/i915/selftests: Exercise resetting in the middle of a wait-on-fence
drm/i915: Eliminate use of PAGE_SIZE as a virtual alignment
drm/i915: Remove superfluous GEN8_LR_CONTEXT_ALIGN
drm/i915: Drop unneed i915 parameter from intel_ring_pin()
drm/i915: Downgrade Gen9 Plane WM latency error
drm/i915: Kick waiters on resetting legacy rings
drm/i915/selftests: Replace opencoded clflush with drm_clflush_virt_range
drm/i915: Interactive RPS mode
drm/i95: Mark GGTT as incoherent for gen10+
drm/i915/execlists: Terminate the context image with BB_END
drm/i915: Drop stray clearing of rps->last_adj
drm/i915/lpe: Mark LPE audio runtime pm as "no callbacks"
drm/i915: Unconditionally clear the pm/guc GT IIR upon acking
drm/i915: Clear all residual RPS events on disabling interrupts
drm/i915: Stop dropping irq around resets
drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start
drm/i915: Pull seqno started checks together
drm/i915: Warn if we hit the timeout for wait-for-idle
drm/i915: Unmask user interrupts writes into HWSP on snb/ivb/vlv/hsw
drm/i915: Remove extra waiter kick on legacy resets
drm/i915: Restore user forcewake domains across suspend
drm/i915/selftests: Hold rpm for unparking
drm/i915: Bump priority of clean up work
drm/i915: Cleanup gt powerstate from gem
drm/i915: Restrict gen6_reset_rps_interrupts to gen6+
drm/i915: Kick waiters on resetting legacy rings
drm/i915: Disable runtime-pm using lowlevel functions if !HAS_RC6
drm/i915: Clear stop-engine for a pardoned reset
drm/i915: Only skip connector output for disable_display
drm/i915: Remove useless error return from intel_init_mocs_engine()
drm/i915: Stop holding a ref to the ppgtt from each vma
drm/i915: Introduce intel_runtime_pm_disable to pair intel_runtime_pm_enable
drm/i915/execlists: Include reset depth in traces
drm/i915/audio: Hook up component bindings even if displays are disabled
drm/i915: Correct CSB probing for engine state dumper
drm/i915/execlists: Flush tasklet directly from reset-finish
drm/i915/ringbuffer: Delay after invalidating gen6+ xcs
drm/i915: Keep physical cursors pinned while in use
drm/i915/selftests: Add a simple exerciser for suspend/hibernate
drm/i915: Determine uses-full-ppgtt from context for execbuf
drm/i915: Do a full device reset after being wedged
drm/i915: Flag any possible writes for a GTT fault
drm/i915: Force the slow path after a user-write error
drm/i915: Early rejection of buffer allocations larger than RAM
drm/i915: Forcibly flush unwanted requests in drop-caches
drm/i915: Fix up FORCE_GPU_RELOC (debug) to flush CPU write domains
drm/i915: Combine cleanup_status_page()
drm/i915: Use a cached mapping for the physical HWS
drm/i915: Double check we didn't miss an unclaimed register access
drm/i915/ringbuffer: Move double invalidate to after pd flush
drm/i915: Pull intel_uncore_arm_unclaimed_mmio_detection() under the spinlock
drm/i915: Be defensive and don't assume PSR has any commit to sync against
drm/i915: Reduce context HW ID lifetime
drm/i915: Attach the pci match data to the device upon creation
drm/i915: Move final cleanup of drm_i915_private to i915_driver_destroy
Daniele Ceraolo Spurio (1):
drm/i915/selftests: ring all doorbells in igt_guc_doorbells
Dhinakaran Pandiyan (11):
drm/i915/mst: Do not retrain new links
drm/i915/mst: Continue state updates even if AUX writes fail.
drm/i915/psr: Print PSR_STATUS when PSR idle wait times out.
drm/i915/psr: Add missing check for I915_PSR_DEBUG_IRQ bit
drm/i915/psr: Mask PSR irq bits when re-enabling interrupts.
drm/i915: Add a small wrapper to check for CCS modifiers.
drm/i915: Rename PLANE_CTL_DECOMPRESSION_ENABLE
drm/i915/psr: Remove wait_for_idle() for PSR2
drm/i915/psr: Rewrite comments in intel_psr_wait_for_idle()
drm/i915: Clean up skl_plane_has_planar()
drm/i915: Do not advertize support for NV12 on ICL yet.
Fredrik Schön (1):
drm/i915: Increase LSPCON timeout
Gwan-gyeong Mun (1):
drm/i915: Fix typo in i915_drm_resume()
Imre Deak (17):
drm/i915/icl: Fix power well anonymous union initializers
drm/i915: Rename intel_power_domains_fini() to intel_power_domains_fini_hw()
drm/i915/vlv: Remove redundant power well ID asserts
drm/i915: Constify power well descriptors
drm/i915/vlv: Use power well CTL IDX instead of ID
drm/i915/ddi: Use power well CTL IDX instead of ID
drm/i915: Remove redundant power well IDs
drm/i915: Make power well ID names more uniform
drm/i915: Use existing power well IDs where possible
drm/i915/icl: Add missing power gate enums
drm/i915: Fix PM refcounting w/o DMC firmware
drm/i915: Refactor intel_display_set_init_power() logic
drm/i915: Verify power domains after enabling them
drm/i915: Simplify condition to keep DMC active during S0ix
drm/i915: Don't check power domains state in intel_power_domains_init_hw()
drm/i915/dp_mst: Fix enabling pipe clock for all streams
drm/i915/bdw: Increase IPS disable timeout to 100ms
Jakub Bartmiński (5):
drm/i915/guc: Avoid wasting memory on incorrect GuC pin bias
drm/i915/guc: Do not partition WOPCM if GuC is not used
drm/i915/guc: Move the pin bias value from GuC to GGTT
drm/i915: Remove unnecessary ggtt_offset_bias from i915_gem_context
drm/i915: Add a fault injection point to WOPCM init
Jan-Marek Glogowski (1):
drm/i915: Re-apply "Perform link quality check, unconditionally during long pulse"
Jani Nikula (1):
drm/i915: set DP Main Stream Attribute for color range on DDI platforms
Joonas Lahtinen (7):
drm/i915: Update DRIVER_DATE to 20180830
drm/i915: Update DRIVER_DATE to 20180830
drm/i915: Update DRIVER_DATE to 20180903
drm/i915: Update DRIVER_DATE to 20180906
drm/i915: Update DRIVER_DATE to 20180906
Merge tag 'gvt-next-2018-09-04' of https://github.com/intel/gvt-linux into drm-intel-next-queued
drm/i915: Update DRIVER_DATE to 20180906
Jyoti Yadav (1):
drm/i915/intel_csr.c Fix DMC FW Loading issue on ICL.
Lionel Landwerlin (3):
drm/i915: clear error registers after error capture
drm/i915/perf: simplify configure all context function
drm/i915/perf: reuse intel_lrc ctx regs macro
Lucas De Marchi (5):
drm/i915/icl: move has_resource_streamer to GEN11_FEATURES
drm/i915: kill resource streamer support
drm/i915: make PCH_GMBUS* definitions private to gvt
drm/i915/gvt: use its own define for gpio
drm/i915: remove confusing GPIO vs PCH_GPIO
Maarten Lankhorst (2):
drm/i915: Allow control of PSR at runtime through debugfs, v6
drm/i915/psr: Add debugfs support to force a downgrade to PSR1 mode.
Mahesh Kumar (2):
drm/i915: ddb_size is of u16 type
drm/i915/skl: distribute DDB based on panel resolution
Manasi Navare (5):
drm/i915/icl: Add remaining registers and bitfields for MG PHY DDI
drm/i915/icl: Implement voltage swing programming sequence for MG PHY DDI
drm/i915/icl: Implement HSDIV_RATIO of MG_CLKTOP2_HSCLKCTL_PORT reg as separate divider value defines
drm/i915/icl: Get DDI clock for ICL for MG PLL and TBT PLL
drm/i915/dsc: Fix PPS register definition macros for 2nd VDSC engine
Matthew Auld (1):
drm/i915/gtt: remove px_page
Michał Winiarski (1):
drm/i915/kvmgt: Fix compilation error
Mika Kuoppala (3):
Revert "drm/i915/icl: WaEnableFloatBlendOptimization"
drm/i915: Expose retry count to per gen reset logic
drm/i915: Force reset on unready engine
Nathan Ciobanu (3):
drm/i915/dp: Limit link training clock recovery loop
drm/i915/dp: Refactor max_vswing_tries variable
drm/i915/dp: Improve clock recovery loop limit comment
Paulo Zanoni (13):
drm/i915/icl: compute the TBT PLL registers
drm/i915/icl: implement icl_digital_port_connected()
drm/i915/icl: store the port type for TC ports
drm/i915/icl: program MG_DP_MODE
drm/i915/icl: toggle PHY clock gating around link training
drm/i915/icl: don't set CNL_DDI_CLOCK_REG_ACCESS_ON anymore
drm/i915: inline skl_copy_ddb_for_pipe() to its only caller
drm/i915/icl: avoid unclaimed PLANE_NV12_BUF_CFG register
drm/i915/icl: account for context save/restore removed bits
drm/i915/icl: implement the tc/legacy HPD {dis,}connect flows
drm/i915: WARN() if we can't lookup_power_well()
drm/i915: use for_each_power_well in lookup_power_well()
drm/i915: move lookup_power_well() up
Rodrigo Vivi (7):
drm/i915: Remove unused "ret" variable.
drm/i915: Fix psr sink status report.
Merge drm/drm-next into drm-intel-next-queued
drm/i915/cfl: Add a new CFL PCI ID.
drm/i915: Free write_buf that we allocated with kzalloc.
drm/i915: introduce dp_to_i915() helper
drm/i915: Use dp_to_i915 on intel_psr.c
Tvrtko Ursulin (2):
drm/i915: Explicitly mark Global GTT address spaces
drm/i915/icl: Fix context RPCS programming
Ville Syrjälä (5):
drm/i915: Fix glk/cnl display w/a #1175
drm/i915: Fix gtt_view asserts
drm/i915: Don't pass plane to .check_plane()
drm/i915: Reject compressed Y/Yf with interlaced modes
drm/i915: Fix ICL+ HDMI clock readout
Zhao Yan (2):
drm/i915/gvt: add a fastpath for cmd parsing on MI_NOOP
drm/i915/gvt: only copy the first page for restore inhibit context
Zhenyu Wang (3):
drm/i915/gvt: make dma map/unmap kvmgt functions as static
drm/i915/gvt: Fix function comment doc errors
drm/i915/gvt: Move some MMIO definitions to reg.h
drivers/gpu/drm/i915/Kconfig.debug | 12 +
drivers/gpu/drm/i915/gvt/cfg_space.c | 12 +
drivers/gpu/drm/i915/gvt/cmd_parser.c | 11 +-
drivers/gpu/drm/i915/gvt/display.c | 1 +
drivers/gpu/drm/i915/gvt/edid.c | 9 +
drivers/gpu/drm/i915/gvt/gtt.c | 9 +-
drivers/gpu/drm/i915/gvt/gvt.c | 3 +-
drivers/gpu/drm/i915/gvt/handlers.c | 34 +-
drivers/gpu/drm/i915/gvt/kvmgt.c | 10 +-
drivers/gpu/drm/i915/gvt/mmio.c | 3 +-
drivers/gpu/drm/i915/gvt/mmio_context.c | 13 -
drivers/gpu/drm/i915/gvt/mmio_context.h | 3 +
drivers/gpu/drm/i915/gvt/opregion.c | 1 -
drivers/gpu/drm/i915/gvt/page_track.c | 2 +
drivers/gpu/drm/i915/gvt/reg.h | 18 +
drivers/gpu/drm/i915/gvt/scheduler.c | 64 +-
drivers/gpu/drm/i915/i915_debugfs.c | 114 ++-
drivers/gpu/drm/i915/i915_drv.c | 194 ++--
drivers/gpu/drm/i915/i915_drv.h | 79 +-
drivers/gpu/drm/i915/i915_gem.c | 65 +-
drivers/gpu/drm/i915/i915_gem.h | 6 -
drivers/gpu/drm/i915/i915_gem_context.c | 232 +++--
drivers/gpu/drm/i915/i915_gem_context.h | 26 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 43 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 52 +-
drivers/gpu/drm/i915/i915_gem_gtt.h | 23 +-
drivers/gpu/drm/i915/i915_gem_object.h | 10 +-
drivers/gpu/drm/i915/i915_irq.c | 40 +-
drivers/gpu/drm/i915/i915_pci.c | 16 +-
drivers/gpu/drm/i915/i915_perf.c | 55 +-
drivers/gpu/drm/i915/i915_reg.h | 731 +++++++-------
drivers/gpu/drm/i915/i915_request.c | 9 +-
drivers/gpu/drm/i915/i915_request.h | 39 +-
drivers/gpu/drm/i915/i915_vma.c | 9 +-
drivers/gpu/drm/i915/i915_vma.h | 10 +-
drivers/gpu/drm/i915/intel_atomic_plane.c | 6 +-
drivers/gpu/drm/i915/intel_audio.c | 3 -
drivers/gpu/drm/i915/intel_breadcrumbs.c | 6 +-
drivers/gpu/drm/i915/intel_csr.c | 33 +-
drivers/gpu/drm/i915/intel_ddi.c | 244 ++++-
drivers/gpu/drm/i915/intel_device_info.h | 2 +-
drivers/gpu/drm/i915/intel_display.c | 199 ++--
drivers/gpu/drm/i915/intel_display.h | 28 +-
drivers/gpu/drm/i915/intel_dp.c | 534 +++++++++--
drivers/gpu/drm/i915/intel_dp_link_training.c | 25 +-
drivers/gpu/drm/i915/intel_dp_mst.c | 14 +-
drivers/gpu/drm/i915/intel_dpll_mgr.c | 62 +-
drivers/gpu/drm/i915/intel_dpll_mgr.h | 1 +
drivers/gpu/drm/i915/intel_drv.h | 45 +-
drivers/gpu/drm/i915/intel_engine_cs.c | 93 +-
drivers/gpu/drm/i915/intel_guc.c | 102 +-
drivers/gpu/drm/i915/intel_guc.h | 12 +-
drivers/gpu/drm/i915/intel_guc_ads.c | 2 +-
drivers/gpu/drm/i915/intel_guc_ct.c | 7 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 1 +
drivers/gpu/drm/i915/intel_guc_log.c | 2 +-
drivers/gpu/drm/i915/intel_guc_submission.c | 35 +-
drivers/gpu/drm/i915/intel_guc_submission.h | 4 +
drivers/gpu/drm/i915/intel_hangcheck.c | 2 +-
drivers/gpu/drm/i915/intel_hdcp.c | 6 +-
drivers/gpu/drm/i915/intel_hdmi.c | 19 +-
drivers/gpu/drm/i915/intel_huc.c | 2 +-
drivers/gpu/drm/i915/intel_i2c.c | 16 +-
drivers/gpu/drm/i915/intel_lpe_audio.c | 4 +-
drivers/gpu/drm/i915/intel_lrc.c | 159 +++-
drivers/gpu/drm/i915/intel_lrc.h | 2 -
drivers/gpu/drm/i915/intel_lrc_reg.h | 2 +-
drivers/gpu/drm/i915/intel_lspcon.c | 2 +-
drivers/gpu/drm/i915/intel_mocs.c | 11 +-
drivers/gpu/drm/i915/intel_mocs.h | 2 +-
drivers/gpu/drm/i915/intel_pm.c | 202 ++--
drivers/gpu/drm/i915/intel_psr.c | 277 ++++--
drivers/gpu/drm/i915/intel_ringbuffer.c | 124 +--
drivers/gpu/drm/i915/intel_ringbuffer.h | 39 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 1003 +++++++++++++-------
drivers/gpu/drm/i915/intel_sprite.c | 13 +-
drivers/gpu/drm/i915/intel_uc_fw.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 176 ++--
drivers/gpu/drm/i915/intel_uncore.h | 1 +
drivers/gpu/drm/i915/intel_wopcm.c | 6 +
drivers/gpu/drm/i915/intel_workarounds.c | 3 -
drivers/gpu/drm/i915/selftests/huge_pages.c | 11 +-
drivers/gpu/drm/i915/selftests/i915_gem.c | 221 +++++
.../gpu/drm/i915/selftests/i915_gem_coherency.c | 38 +-
drivers/gpu/drm/i915/selftests/i915_gem_object.c | 22 +-
.../gpu/drm/i915/selftests/i915_live_selftests.h | 1 +
drivers/gpu/drm/i915/selftests/intel_guc.c | 38 +
drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 101 +-
drivers/gpu/drm/i915/selftests/intel_uncore.c | 2 +-
drivers/gpu/drm/i915/selftests/mock_context.c | 11 +-
drivers/gpu/drm/i915/selftests/mock_gtt.c | 2 +
include/drm/i915_pciids.h | 1 +
include/uapi/drm/i915_drm.h | 22 +
93 files changed, 4051 insertions(+), 1910 deletions(-)
create mode 100644 drivers/gpu/drm/i915/selftests/i915_gem.c
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