[Bug 108015] Enabling pp_od_clk_voltage causes the gpu to be locked to lowest power level until some value is written to pp_od_clk_voltage and then the pp_od_clk_voltage is reset.
bugzilla-daemon at freedesktop.org
bugzilla-daemon at freedesktop.org
Tue Sep 25 15:49:02 UTC 2018
https://bugs.freedesktop.org/show_bug.cgi?id=108015
--- Comment #2 from igo95862 at yandex.ru ---
After doing some more tests, it seems like changing the clock frequency only
takes 1 commit but voltage 2.
--
You are receiving this mail because:
You are the assignee for the bug.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://lists.freedesktop.org/archives/dri-devel/attachments/20180925/da507f1a/attachment.html>
More information about the dri-devel
mailing list