[PATCH v9 2/5] drm/sun4i: sun6i_mipi_dsi: Fix TCON DRQ set bits

[Maxime Ripard]

On Thu, Mar 28, 2019 at 05:23:39PM +0530, Jagan Teki wrote:
> On Tue, Mar 19, 2019 at 4:26 PM Maxime Ripard <maxime.ripard at bootlin.com> wrote:
> >
> > On Mon, Mar 11, 2019 at 08:28:22PM +0530, Jagan Teki wrote:
> > > On Mon, Mar 11, 2019 at 7:39 PM Maxime Ripard <maxime.ripard at bootlin.com> wrote:
> > > >
> > > > On Thu, Mar 07, 2019 at 09:24:02PM +0530, Jagan Teki wrote:
> > > > > On Thu, Mar 7, 2019 at 9:09 PM Maxime Ripard <maxime.ripard at bootlin.com> wrote:
> > > > > >
> > > > > > On Thu, Mar 07, 2019 at 05:49:07PM +0530, Jagan Teki wrote:
> > > > > > > On Mon, Mar 4, 2019 at 9:13 PM Maxime Ripard <maxime.ripard at bootlin.com> wrote:
> > > > > > > >
> > > > > > > > On Sun, Mar 03, 2019 at 11:05:24PM +0530, Jagan Teki wrote:
> > > > > > > > > TCON DRQ for non-burst DSI mode can computed based on horizontal
> > > > > > > > > front porch value, but the current driver trying to include sync
> > > > > > > > > timings along with front porch resulting wrong drq.
> > > > > > > > >
> > > > > > > > > This patch is trying to update the drq by subtracting hsync_start
> > > > > > > > > with hdisplay, which is horizontal front porch.
> > > > > > > > >
> > > > > > > > > Current code:
> > > > > > > > > ------------
> > > > > > > > > mode->hsync_end - mode->hdisplay => horizontal front porch + sync
> > > > > > > > >
> > > > > > > > > With this patch:
> > > > > > > > > ----------------
> > > > > > > > > mode->hsync_start - mode->hdisplay => horizontal front porch
> > > > > > > > >
> > > > > > > > > BSP code form BPI-M64-bsp is computing TCON DRQ set bits
> > > > > > > > > for non-burts as (from linux-sunxi/
> > > > > > > > > drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
> > > > > > > > >
> > > > > > > > > => panel->lcd_ht -    panel->lcd_x - panel->lcd_hbp
> > > > > > > > > => (timmings->hor_front_porch + panel->lcd_hbp + panel->lcd_x)
> > > > > > > >                                   ^ + sync length +
> > > > > > > > >    - panel->lcd_x - panel->hbp
> > > > > > > > > => timmings->hor_front_porch
> > > > > > > >                                ^ + sync
> > > > > > > > > => mode->hsync_start - mode->hdisplay
> > > > > > > >
> > > > > > > > s/hsync_start/hsync_end/
> > > > > > >
> > > > > > > No, it should be front porch so it is hsync_start. This change is
> > > > > > > trying to update DRQ set to use front porch and above evaluation from
> > > > > > > BSP, result the same front front porch
> > > > > > >
> > > > > > > Current driver has hsync_end - hdisplay which is not front porch
> > > > > > > timing (it is adding extra sync timing).
> > > > > >
> > > > > > It would be if you considered that the back porch actually was the
> > > > > > back porch plus the sync length. I have found no such evidence, quite
> > > > > > the opposite actually, everything seems to point at the fact that
> > > > > > unlike the TCON, the DSI block uses the back porch as only the back
> > > > > > porch.
> > > > >
> > > > > Sorry, I'm not clear about back porch here.
> > > > >
> > > > > The current code has mode->hsync_end - mode->hdisplay which is Front
> > > > > porch + sync time do you think it's not?
> > > >
> > > > It is.
> > > >
> > > > > DRQ set time is pure front porch value (according BSP) as I didn't
> > > > > see any information about DRQ set bits in manual or anywhere.
> > > >
> > > > This is what I'm telling you. If you consider the back porch as only
> > > > the back porch, then the result of that BSP calculation you mentionned
> > > > earlier is the front porch and the sync length.
> > > >
> > > > You imply that the back porch should actually be treated as the back
> > > > porch and the sync length in your calculation. What makes you say so?
> > >
> > > I'm consider the computations accordingly to drm_modes.h and which
> > > matches similar like BSP code.
> > >
> > > mode->hsync_end - mode->hdisplay = front porch + sync
> > >
> > > but the actual computation is
> > > mode->hsync_start - mode->hdisplay =>  front porch
> > >
> > > Which is similar to what BSP is using.
> > >
> > > => panel->lcd_ht -    panel->lcd_x - panel->lcd_hbp
> > > => (timmings->hor_front_porch + panel->lcd_hbp + panel->lcd_x)
> > >    - panel->lcd_x - panel->hbp
> > > => timmings->hor_front_porch
> > > => mode->hsync_start - mode->hdisplay
> >
> > You're missing the point. What I'm asking for is why you think that
> > panel->lcd_ht == (timmings->hor_front_porch + panel->lcd_hbp +
> > panel->lcd_x) and not timmings->hor_front_porch + panel->lcd_hbp +
> > sync_width + panel->lcd_x
>
> No ie not true we can't include sync_width, please see here [1]
>
> timmings->hor_front_porch= panel_info->lcd_ht-panel_info->lcd_hbp -
> panel_info->lcd_x;
> panel_info->lcd_ht = timmings->hor_front_porch + panel_info->lcd_hbp +
> panel_info->lcd_x;
>
> and the result of this lcd_ht is exactly matched with Mainline timings
> or any supported panel in A64.
>
> [1] https://github.com/longsleep/linux-pine64/blob/pine64-hacks-1.2/drivers/video/sunxi/disp2/disp/de/disp_lcd.c#L1839

Can we please start to reason in actual timings instead of whatever
Allwinner comes up with in their BSP?

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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