[PATCH v4] dt-bindings: drm/msm/a6xx: Document interconnect properties for GPU
Jordan Crouse
jcrouse at codeaurora.org
Fri Apr 19 19:56:27 UTC 2019
Add documentation for the interconnect and interconnect-names bindings
for the GPU node as detailed by bindings/interconnect/interconnect.txt.
Signed-off-by: Jordan Crouse <jcrouse at codeaurora.org>
Reviewed-by: Douglas Anderson <dianders at chromium.org>
Reviewed-by: Rob Herring <robh at kernel.org>
Acked-by: Georgi Djakov <georgi.djakov at linaro.org>
---
v4: Fix spelling nits per Georgi
Documentation/devicetree/bindings/display/msm/gpu.txt | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.txt b/Documentation/devicetree/bindings/display/msm/gpu.txt
index aad1aef..c04614c 100644
--- a/Documentation/devicetree/bindings/display/msm/gpu.txt
+++ b/Documentation/devicetree/bindings/display/msm/gpu.txt
@@ -22,6 +22,8 @@ Required properties:
- qcom,adreno-630.2
- iommus: optional phandle to an adreno iommu instance
- operating-points-v2: optional phandle to the OPP operating points
+- interconnects: optional phandle to an interconnect provider. See
+ ../interconnect/interconnect.txt for details.
- qcom,gmu: For GMU attached devices a phandle to the GMU device that will
control the power for the GPU. Applicable targets:
- qcom,adreno-630.2
@@ -70,6 +72,8 @@ Example a6xx (with GMU):
operating-points-v2 = <&gpu_opp_table>;
+ interconnects = <&rsc_hlos MASTER_GFX3D &rsc_hlos SLAVE_EBI1>;
+
qcom,gmu = <&gmu>;
};
};
--
2.7.4
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