[PATCHv2 12/22] drm/bridge: tc358767: remove unnecessary msleep

Andrey Gusakov andrey.gusakov at cogentembedded.com
Tue Apr 23 07:52:00 UTC 2019


Hi


On Sun, Apr 21, 2019 at 12:43 AM Laurent Pinchart
<laurent.pinchart at ideasonboard.com> wrote:
>
> Hi Tomi,
>
> Thank you for the patch.
>
> On Tue, Mar 26, 2019 at 12:31:36PM +0200, Tomi Valkeinen wrote:
> > For some reason the driver has a msleep(100) after writing to
> > DP_PHY_CTRL. Toshiba's documentation doesn't suggest any delay is
> > needed, and I have not seen any issues with the sleep removed.
>
> I can't comment on this as I don't have access to the datasheet. The
> code change itself is fine.
>
> Andrey, do you remember why a sleep was added there in the first place ?
I see no reason for this delay. Seems this was not cleaned-up after debug.

Reviewed-by: Andrey Gusakov <andrey.gusakov at cogentembedded.com>

>
> > Drop it, as msleep(100) is a rather big one.
> >
> > Signed-off-by: Tomi Valkeinen <tomi.valkeinen at ti.com>
> > ---
> >  drivers/gpu/drm/bridge/tc358767.c | 1 -
> >  1 file changed, 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
> > index f628575c9de9..2a6c0c0d47a6 100644
> > --- a/drivers/gpu/drm/bridge/tc358767.c
> > +++ b/drivers/gpu/drm/bridge/tc358767.c
> > @@ -872,7 +872,6 @@ static int tc_main_link_enable(struct tc_data *tc)
> >       if (tc->link.base.num_lanes == 2)
> >               dp_phy_ctrl |= PHY_2LANE;
> >       tc_write(DP_PHY_CTRL, dp_phy_ctrl);
> > -     msleep(100);
> >
> >       /* PLL setup */
> >       tc_write(DP0_PLLCTRL, PLLUPDATE | PLLEN);
>
> --
> Regards,
>
> Laurent Pinchart


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