[PATCH 0/6] drm+dma: cache support for arm, etc
Christian.Koenig at amd.com
Thu Aug 15 18:48:39 UTC 2019
Sorry if the style is messed up, replying from my phone.
Am 15.08.2019 20:27 schrieb Christoph Hellwig <hch at lst.de>:
On Thu, Aug 15, 2019 at 06:21:00PM +0000, Koenig, Christian wrote:
> > (2) Add support for DMA_ATTR_NO_KERNEL_MAPPING to this new API instead
> > of dma_alloc_attrs. The initial difference with that flag is just
> > that we allow highmem, but in the future we could also unmap this
> > memory from the kernel linear mapping entirely on architectures
> > where we can easily do that.
> Mhm, why would we want to do this?
To avoid the CPU misspeculating into this memory. For example NVMe SSDs
have a feature called host memory buffer that is a lot like your stolen
main ram for the GPU case. We currently hand the SSD a
DMA_ATTR_NO_KERNEL_MAPPING allocation if it requests such a buffer. If
possible we'd really like to make sure no speculative execution bug
(or intentional attacker with a kernel exploit for that matter) can easily
access that memory.
Well, for the graphics case I absolutely need to keep the linear kernel mapping. Because for certain use cases the memory is accessed by the kernel all the time as well.
Why should accessing uncached memory be more of a security problem than accessing cached?
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