[Intel-gfx] [PATCH 03/11] drm/i915: Disable HDCP signalling on transcoder disable

[Sean Paul]

On Thu, Dec 05, 2019 at 09:33:19PM +0200, Ville Syrjälä wrote:
> On Tue, Dec 03, 2019 at 12:36:26PM -0500, Sean Paul wrote:
> > From: Sean Paul <seanpaul at chromium.org>
> > 
> > Currently we rely on intel_hdcp_disable() to disable HDCP signalling in
> > the DDI Function Control register. This patch adds a safety net by also
> > clearing the bit when we disable the transcoder.
> > 
> > Once we have HDCP over MST and disappearing connectors, we want to make
> > sure that the signalling is truly disabled even if HDCP teardown doesn't
> > go as planned.
> 
> Why wouldn't it go as planned?
> 

Because things can fail in weird and wonderful ways on unplug :-)

It's a safety net. I saw this function and figured HDCP signalling should be
explicitly cleared here as well.

Sean

> > 
> > Signed-off-by: Sean Paul <seanpaul at chromium.org>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++++++-------
> >  1 file changed, 6 insertions(+), 7 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index b51f244ad7a5..e8ac98a8ee7f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1952,13 +1952,12 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
> >  	i915_reg_t reg = TRANS_DDI_FUNC_CTL(cpu_transcoder);
> >  	u32 val = I915_READ(reg);
> >  
> > -	if (INTEL_GEN(dev_priv) >= 12) {
> > -		val &= ~(TRANS_DDI_FUNC_ENABLE | TGL_TRANS_DDI_PORT_MASK |
> > -			 TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
> > -	} else {
> > -		val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_PORT_MASK |
> > -			 TRANS_DDI_DP_VC_PAYLOAD_ALLOC);
> > -	}
> > +	val &= ~(TRANS_DDI_FUNC_ENABLE | TRANS_DDI_DP_VC_PAYLOAD_ALLOC |
> > +		 TRANS_DDI_HDCP_SIGNALLING);
> > +	if (INTEL_GEN(dev_priv) >= 12)
> > +		val &= ~TGL_TRANS_DDI_PORT_MASK;
> > +	else
> > +		val &= ~TRANS_DDI_PORT_MASK;
> >  	I915_WRITE(reg, val);
> >  
> >  	if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> > -- 
> > Sean Paul, Software Engineer, Google / Chromium OS
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel

-- 
Sean Paul, Software Engineer, Google / Chromium OS