[PATCH] drm/hisilicon: Added three new resolutions and changed the alignment to 128 Bytes

tiantao (H) tiantao6 at huawei.com
Tue Dec 31 01:25:54 UTC 2019


Hi Daniel:

Thanks you very much ,I will follow your suggestion to split this to 
three patches.

Best
在 2019/12/30 18:23, Daniel Stone 写道:
> Hi Tian,
> 
> On Sat, 28 Dec 2019 at 01:14, Tian Tao <tiantao6 at hisilicon.com> wrote:
>> @@ -118,11 +119,9 @@ static void hibmc_plane_atomic_update(struct drm_plane *plane,
>>          writel(gpu_addr, priv->mmio + HIBMC_CRT_FB_ADDRESS);
>>
>>          reg = state->fb->width * (state->fb->format->cpp[0]);
>> -       /* now line_pad is 16 */
>> -       reg = PADDING(16, reg);
>>
>>          line_l = state->fb->width * state->fb->format->cpp[0];
>> -       line_l = PADDING(16, line_l);
>> +       line_l = PADDING(128, line_l);
> 
> The 'line length' here is the 'stride' field of the FB. Stride is set
> by userspace when allocating the buffer, and the kernel must not
> attempt to guess what userspace set.
> 
> You should use state->fb->strides[0] directly here, and in your
> atomic_check() function, make sure that the framebuffer stride is
> correctly aligned.
> 
> Please split this into a separate change. Your commit has three
> changes in it, which should all be separate commits:
>    * enforce 128-byte stride alignment (is this a hardware limit?)
>    * get the BO from drm_fb rather than hibmc_fb (can hibmc_fb->obj
> just be removed now?)
>    * add new clock/resolution configurations
> 
> Cheers,
> Daniel
> 
> .
> 



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