[PATCH v3 06/11] drm/sun4i: rgb: Add DT property to disable strict clock rate check

[Vasily Khoruzhick]

Clock rate check that was added in commit bb43d40d7c83 ("drm/sun4i: rgb:
Validate the clock rate") prevents some panel and bridges from working with
sun4i driver.

Unfortunately, dotclock frequency for some modes are not achievable on
sunxi hardware, and there's a slight deviation in rate returned by
clk_round_rate(), so they fail this check.

Experiments show that panels and bridges work fine with this slight
deviation, e.g. Pinebook that uses ANX6345 bridge with 768p eDP panel
requests 73 MHz, gets 72.296MHz instead (0.96% difference) and works just
fine.

This patch adds DT property to disable strict clock rate check

Signed-off-by: Vasily Khoruzhick <anarsoul at gmail.com>
---
 .../devicetree/bindings/display/sunxi/sun4i-drm.txt          | 2 ++
 drivers/gpu/drm/sun4i/sun4i_rgb.c                            | 5 +++++
 drivers/gpu/drm/sun4i/sun4i_tcon.c                           | 3 +++
 drivers/gpu/drm/sun4i/sun4i_tcon.h                           | 1 +
 4 files changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index f426bdb42f18..18c8b053a28d 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -63,6 +63,8 @@ Required properties:
     Documentation/devicetree/bindings/media/video-interfaces.txt. The
     first port should be the input endpoint. The second should be the
     output, usually to an HDMI connector.
+  - no-strict-clock-check: don't reject timings if exact dot clock can't be
+    reached.
 
 DWC HDMI TX Encoder
 -------------------
diff --git a/drivers/gpu/drm/sun4i/sun4i_rgb.c b/drivers/gpu/drm/sun4i/sun4i_rgb.c
index f4a22689eb54..b392d4b1ebd3 100644
--- a/drivers/gpu/drm/sun4i/sun4i_rgb.c
+++ b/drivers/gpu/drm/sun4i/sun4i_rgb.c
@@ -94,7 +94,12 @@ static enum drm_mode_status sun4i_rgb_mode_valid(struct drm_encoder *crtc,
 
 	tcon->dclk_min_div = 6;
 	tcon->dclk_max_div = 127;
+
+	if (tcon->no_strict_clock_check)
+		return MODE_OK;
+
 	rounded_rate = clk_round_rate(tcon->dclk, rate);
+
 	if (rounded_rate < rate)
 		return MODE_CLOCK_LOW;
 
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c
index cf45d0f940f9..f5f7f479332b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.c
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c
@@ -1108,6 +1108,9 @@ static int sun4i_tcon_bind(struct device *dev, struct device *master,
 	tcon->id = engine->id;
 	tcon->quirks = of_device_get_match_data(dev);
 
+	tcon->no_strict_clock_check = of_property_read_bool(dev->of_node,
+						"no-strict-clock-check");
+
 	tcon->lcd_rst = devm_reset_control_get(dev, "lcd");
 	if (IS_ERR(tcon->lcd_rst)) {
 		dev_err(dev, "Couldn't get our reset line\n");
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h
index b5214d71610f..ab510b80004a 100644
--- a/drivers/gpu/drm/sun4i/sun4i_tcon.h
+++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h
@@ -258,6 +258,7 @@ struct sun4i_tcon {
 	struct reset_control		*lvds_rst;
 
 	struct drm_panel		*panel;
+	bool				no_strict_clock_check;
 
 	/* Platform adjustments */
 	const struct sun4i_tcon_quirks	*quirks;
-- 
2.20.1