[PATCH RFC 1/3] drm/i2c: tda998x: implement different I2S flavours

[Russell King - ARM Linux admin]

On Mon, Feb 25, 2019 at 03:28:51PM +0200, Peter Ujfalusi wrote:
> hi Russell,
> 
> On 22/02/2019 23.27, Russell King wrote:
> > Add support for the left and right justified I2S formats as well as the
> > more tranditional "Philips" I2S format.
> 
> First of all, thank you for the patch, it works.
> 
> Tested-by: Peter Ujfalusi <peter.ujfalusi at ti.com>
> 
> There is however one thing I'm not sure about.
> the 3.8 kernel configured the page0:0xfc register [1]:
> /* select I2S format, and datasize */
> reg_write(encoder, REG_I2S_FORMAT, 0x0a);
> 
> In theory this should select left_j and set bit3 which does something.
> It looks like that the McASP is configured to I2S mode in 3.8 kernel
> which would result channel swap at least there (I2S vs left_j).
> 
> Do you know what the bit3 is configuring and to what?

Bits 2 and 3 are something to do with "data size" which is as much
information as I have on those two bits.  Maybe they apply to the
right justified mode as that would certainly need to know the width
of the supplied I2S sample data.

-- 
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