[PATCH 3/3] drm/bridge: ti-sn65dsi86: correct dsi mode_flags

Rob Clark robdclark at gmail.com
Tue Jul 2 17:12:31 UTC 2019


On Tue, Jul 2, 2019 at 10:09 AM Jeffrey Hugo <jeffrey.l.hugo at gmail.com> wrote:
>
> On Tue, Jul 2, 2019 at 9:46 AM Rob Clark <robdclark at gmail.com> wrote:
> >
> > From: Rob Clark <robdclark at chromium.org>
> >
> > Noticed while comparing register dump of how bootloader configures DSI
> > vs how kernel configures.  It seems the bridge still works either way,
> > but fixing this clears the 'CHA_DATATYPE_ERR' error status bit.
> >
> > Signed-off-by: Rob Clark <robdclark at chromium.org>
> > ---
> >  drivers/gpu/drm/bridge/ti-sn65dsi86.c | 3 +--
> >  1 file changed, 1 insertion(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > index a6f27648c015..c8fb45e7b06d 100644
> > --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> > @@ -342,8 +342,7 @@ static int ti_sn_bridge_attach(struct drm_bridge *bridge)
> >         /* TODO: setting to 4 lanes always for now */
> >         dsi->lanes = 4;
> >         dsi->format = MIPI_DSI_FMT_RGB888;
> > -       dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
> > -                         MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
> > +       dsi->mode_flags = MIPI_DSI_MODE_VIDEO;
>
> Did you check this against the datasheet?  Per my reading, EOT_PACKET
> and VIDEO_HSE appear valid.  I don't know about VIDEO_SYNC_PULSE.

The EOT flat is badly named:

/* disable EoT packets in HS mode */
#define MIPI_DSI_MODE_EOT_PACKET    BIT(9)

I can double check out HSE, but this was one of the setting
differences between bootloader and kernel

BR,
-R


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