[PATCH v2 1/6] drm: move DP_MAX_DOWNSTREAM_PORTS from i915 to drm core

Oleg Vasilev oleg.vasilev at intel.com
Mon Jul 15 11:23:29 UTC 2019


DP_MAX_DOWNSTREAM_PORTS=0x10 is a vendor-independent constant.

Signed-off-by: Oleg Vasilev <oleg.vasilev at intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h | 2 --
 include/drm/drm_dp_helper.h      | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 770f9f6aad84..f110c5e79610 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1083,8 +1083,6 @@ struct intel_hdmi {
 };
 
 struct intel_dp_mst_encoder;
-#define DP_MAX_DOWNSTREAM_PORTS		0x10
-
 /*
  * enum link_m_n_set:
  *	When platform provides two set of M_N registers for dp, we can
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 397896b5b21a..e0c157cde986 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -349,6 +349,8 @@
 # define DP_DS_12BPC		            2
 # define DP_DS_16BPC		            3
 
+#define DP_MAX_DOWNSTREAM_PORTS		    0x10
+
 /* DP Forward error Correction Registers */
 #define DP_FEC_CAPABILITY		    0x090    /* 1.4 */
 # define DP_FEC_CAPABLE			    (1 << 0)
-- 
2.22.0



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