[PATCH v3] drm/fourcc: add ARM GPU tile modifier

[Qiang Yu]

v2: separate AFBC and GPU encoding

v3: rename device to type and GPU modifer name

Cc: Brian Starkey <Brian.Starkey at arm.com>
Cc: Rob Herring <robh at kernel.org>
Cc: Alyssa Rosenzweig <alyssa at rosenzweig.io>
Cc: Ayan Halder <Ayan.Halder at arm.com>
Signed-off-by: Qiang Yu <yuq825 at gmail.com>
---
 include/uapi/drm/drm_fourcc.h | 31 ++++++++++++++++++++++++++++++-
 1 file changed, 30 insertions(+), 1 deletion(-)

diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 9fa7cf7bb274..f80a675cb09a 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -601,6 +601,19 @@ extern "C" {
  */
 #define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6)
 
+/*
+ * Arm Buffer Layout Type Code
+ *
+ * Arm has multiple types of buffer layout which are not totally shared
+ * across devices, so add a type field at the MSB of the format field
+ * to separate each type's encoding.
+ */
+#define DRM_FORMAT_MOD_ARM_TYPE_AFBC 0x00
+#define DRM_FORMAT_MOD_ARM_TYPE_AGTB 0x01
+
+#define DRM_FORMAT_MOD_ARM_CODE(type, val) \
+	fourcc_mod_code(ARM, ((__u64)type << 48) | ((val) & 0x0000ffffffffffffULL))
+
 /*
  * Arm Framebuffer Compression (AFBC) modifiers
  *
@@ -615,7 +628,8 @@ extern "C" {
  * Further information on the use of AFBC modifiers can be found in
  * Documentation/gpu/afbc.rst
  */
-#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode)	fourcc_mod_code(ARM, __afbc_mode)
+#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) \
+	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AFBC, __afbc_mode)
 
 /*
  * AFBC superblock size
@@ -709,6 +723,21 @@ extern "C" {
  */
 #define AFBC_FORMAT_MOD_BCH     (1ULL << 11)
 
+/*
+ * Arm Graphics Tiled Buffer (AGTB) modifiers
+ */
+#define DRM_FORMAT_MOD_ARM_AGTB(mode) \
+	DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_TYPE_AGTB, mode)
+
+/*
+ * AGTB mode 0 modifier
+ *
+ * This is used by ARM Mali Utgard/Midgard GPU. It divides buffer into
+ * 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
+ * in the block are reordered.
+ */
+#define DRM_FORMAT_MOD_ARM_AGTB_MODE0 DRM_FORMAT_MOD_ARM_AGTB(1)
+
 /*
  * Allwinner tiled modifier
  *
-- 
2.17.1