[PATCH v2] drm/exynos/mixer: fix MIXER shadow registry synchronisation code
Inki Dae
inki.dae at samsung.com
Thu Mar 21 09:41:56 UTC 2019
Hi Marek,
19. 3. 21. 오후 5:32에 Marek Szyprowski 이(가) 쓴 글:
> Hi Inki,
>
> On 2019-03-21 09:20, Inki Dae wrote:
>> 19. 3. 19. 오후 10:05에 Andrzej Hajda 이(가) 쓴 글:
>>> MIXER on Exynos5 SoCs uses different synchronisation method than Exynos4
>>> to update internal state (shadow registers).
>>> Apparently the driver implements it incorrectly. The rule should be
>>> as follows:
>>> - do not request updating registers until previous request was finished,
>>> ie. MXR_CFG_LAYER_UPDATE_COUNT must be 0.
>>> - before setting registers synchronisation on VSYNC should be turned off,
>>> ie. MXR_STATUS_SYNC_ENABLE should be reset,
>>> - after finishing MXR_STATUS_SYNC_ENABLE should be set again.
>>> The patch hopefully implements it correctly.
>>> Below sample kernel log from page fault caused by the bug:
>>>
>>> [ 25.670038] exynos-sysmmu 14650000.sysmmu: 14450000.mixer: PAGE FAULT occurred at 0x2247b800
>>> [ 25.677888] ------------[ cut here ]------------
>>> [ 25.682164] kernel BUG at ../drivers/iommu/exynos-iommu.c:450!
>>> [ 25.687971] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
>>> [ 25.693778] Modules linked in:
>>> [ 25.696816] CPU: 5 PID: 1553 Comm: fb-release_test Not tainted 5.0.0-rc7-01157-g5f86b1566bdd #136
>>> [ 25.705646] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
>>> [ 25.711710] PC is at exynos_sysmmu_irq+0x1c0/0x264
>>> [ 25.716470] LR is at lock_is_held_type+0x44/0x64
>>>
>>> v2: added missing MXR_CFG_LAYER_UPDATE bit setting in mixer_enable_sync
>>>
>>> Reported-by: Marian Mihailescu <mihailescu2m at gmail.com>
>>> Signed-off-by: Andrzej Hajda <a.hajda at samsung.com>
>>> ---
>>> Hi Inki and Marian,
>>>
>>> This is fixed version of my previous patch. The only difference is
>>> added missing MXR_CFG_LAYER_UPDATE setting in mixer_enable_sync.
>>> I hope this time it is correct. It should solve one page fault issue
>>> in MIXER, Marek is preparing fix for another issue (to low clock set by
>>> devfreq). I hope with both patches page faults will not happen anymore ;)
>> With this patch modetest worked well.
>> BTW, this change may affect Exynos4 series - which have different synchronization way to update shadow registers - so could you or someone else who has Exynos4xxx based board check it on Odroid-u3 board? I have no board. :(
>
> Andrzej's patch has been tested on Exynos4412 too. HDMI display works
> fine on Odroid U3.
Applied.
Thanks,
Inki Dae
>
> ...
>
> Best regards
>
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