[Freedreno] [PATCH v1 2/3] drm/msm: Print all 64 bits of the faulting IOMMU address

[Kristian Høgsberg]

On Tue, May 7, 2019 at 11:02 AM Jordan Crouse <jcrouse at codeaurora.org> wrote:
>
> When we move to 64 bit addressing for a5xx and a6xx targets we will start
> seeing pagefaults at larger addresses so format them appropriately in the
> log message for easier debugging.

Yes please, this has confused me more than once.

Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>

> Signed-off-by: Jordan Crouse <jcrouse at codeaurora.org>
> ---
>
>  drivers/gpu/drm/msm/msm_iommu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/msm_iommu.c b/drivers/gpu/drm/msm/msm_iommu.c
> index 12bb54c..1926329 100644
> --- a/drivers/gpu/drm/msm/msm_iommu.c
> +++ b/drivers/gpu/drm/msm/msm_iommu.c
> @@ -30,7 +30,7 @@ static int msm_fault_handler(struct iommu_domain *domain, struct device *dev,
>         struct msm_iommu *iommu = arg;
>         if (iommu->base.handler)
>                 return iommu->base.handler(iommu->base.arg, iova, flags);
> -       pr_warn_ratelimited("*** fault: iova=%08lx, flags=%d\n", iova, flags);
> +       pr_warn_ratelimited("*** fault: iova=%16lx, flags=%d\n", iova, flags);
>         return 0;
>  }
>
> --
> 2.7.4
>
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