[PATCH] drm/komeda: Clear enable bit in CU_INPUTx_CONTROL

[james qian wang (Arm Technology China)]

On Wed, May 15, 2019 at 11:02:05AM +0800, Lowry Li (Arm Technology China) wrote:
> Besides clearing the input ID to zero, D71 compiz also has input
> enable bit in CU_INPUTx_CONTROL which need to be cleared.
> 
> Signed-off-by: Lowry Li (Arm Technology China) <lowry.li at arm.com>
> ---
>  drivers/gpu/drm/arm/display/komeda/d71/d71_component.c | 12 +++++++++++-
>  1 file changed, 11 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> index 1135e38..f8846c6 100644
> --- a/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> +++ b/drivers/gpu/drm/arm/display/komeda/d71/d71_component.c
> @@ -435,8 +435,18 @@ static void d71_component_disable(struct komeda_component *c)
>  
>  	malidp_write32(reg, BLK_CONTROL, 0);
>  
> -	for (i = 0; i < c->max_active_inputs; i++)
> +	for (i = 0; i < c->max_active_inputs; i++) {
>  		malidp_write32(reg, BLK_INPUT_ID0 + (i << 2), 0);
> +
> +		/* Besides clearing the input ID to zero, D71 compiz also has
> +		 * input enable bit in CU_INPUTx_CONTROL which need to be
> +		 * cleared.
> +		 */
> +		if (has_bit(c->id, KOMEDA_PIPELINE_COMPIZS))
> +			malidp_write32(reg, CU_INPUT0_CONTROL +
> +				       i * CU_PER_INPUT_REGS * 4,
> +				       CU_INPUT_CTRL_ALPHA(0xFF));
> +	}
>  }
>  
>  static void compiz_enable_input(u32 __iomem *id_reg,
> -- 
> 1.9.1
> 

Looks good to me.

Reviewed-by: James Qian Wang (Arm Technology China) <james.qian.wang at arm.com>