[Intel-gfx] [PATCH] drm/i915/dsi: Use a fuzzy check for burst mode clock check

kbuild test robot lkp at intel.com
Fri May 24 22:15:14 UTC 2019


Hi Hans,

I love your patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on v5.2-rc1 next-20190524]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]

url:    https://github.com/0day-ci/linux/commits/Hans-de-Goede/drm-i915-dsi-Use-a-fuzzy-check-for-burst-mode-clock-check/20190525-045136
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
        # save the attached .config to linux build tree
        make ARCH=x86_64 

If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp at intel.com>

All errors (new ones prefixed by >>):


vim +867 drivers/gpu/drm/i915/intel_dsi_vbt.c

   803	
   804	bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)
   805	{
   806		struct drm_device *dev = intel_dsi->base.base.dev;
   807		struct drm_i915_private *dev_priv = to_i915(dev);
   808		struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
   809		struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps;
   810		struct drm_display_mode *mode = dev_priv->vbt.lfp_lvds_vbt_mode;
   811		u16 burst_mode_ratio;
   812		enum port port;
   813	
   814		DRM_DEBUG_KMS("\n");
   815	
   816		intel_dsi->eotp_pkt = mipi_config->eot_pkt_disabled ? 0 : 1;
   817		intel_dsi->clock_stop = mipi_config->enable_clk_stop ? 1 : 0;
   818		intel_dsi->lane_count = mipi_config->lane_cnt + 1;
   819		intel_dsi->pixel_format =
   820				pixel_format_from_register_bits(
   821					mipi_config->videomode_color_format << 7);
   822	
   823		intel_dsi->dual_link = mipi_config->dual_link;
   824		intel_dsi->pixel_overlap = mipi_config->pixel_overlap;
   825		intel_dsi->operation_mode = mipi_config->is_cmd_mode;
   826		intel_dsi->video_mode_format = mipi_config->video_transfer_mode;
   827		intel_dsi->escape_clk_div = mipi_config->byte_clk_sel;
   828		intel_dsi->lp_rx_timeout = mipi_config->lp_rx_timeout;
   829		intel_dsi->hs_tx_timeout = mipi_config->hs_tx_timeout;
   830		intel_dsi->turn_arnd_val = mipi_config->turn_around_timeout;
   831		intel_dsi->rst_timer_val = mipi_config->device_reset_timer;
   832		intel_dsi->init_count = mipi_config->master_init_timer;
   833		intel_dsi->bw_timer = mipi_config->dbi_bw_timer;
   834		intel_dsi->video_frmt_cfg_bits =
   835			mipi_config->bta_enabled ? DISABLE_VIDEO_BTA : 0;
   836		intel_dsi->bgr_enabled = mipi_config->rgb_flip;
   837	
   838		/* Starting point, adjusted depending on dual link and burst mode */
   839		intel_dsi->pclk = mode->clock;
   840	
   841		/* In dual link mode each port needs half of pixel clock */
   842		if (intel_dsi->dual_link) {
   843			intel_dsi->pclk /= 2;
   844	
   845			/* we can enable pixel_overlap if needed by panel. In this
   846			 * case we need to increase the pixelclock for extra pixels
   847			 */
   848			if (intel_dsi->dual_link == DSI_DUAL_LINK_FRONT_BACK) {
   849				intel_dsi->pclk += DIV_ROUND_UP(mode->vtotal * intel_dsi->pixel_overlap * 60, 1000);
   850			}
   851		}
   852	
   853		/* Burst Mode Ratio
   854		 * Target ddr frequency from VBT / non burst ddr freq
   855		 * multiply by 100 to preserve remainder
   856		 */
   857		if (intel_dsi->video_mode_format == VIDEO_MODE_BURST) {
   858			if (mipi_config->target_burst_mode_freq) {
   859				u32 bitrate = intel_dsi_bitrate(intel_dsi);
   860	
   861				/*
   862				 * Sometimes the VBT contains a slightly lower clock,
   863				 * then the bitrate we have calculated, in this case
   864				 * just replace it with the calculated bitrate.
   865				 */
   866				if (mipi_config->target_burst_mode_freq < bitrate &&
 > 867				    intel_fuzzy_clock_check(

---
0-DAY kernel test infrastructure                Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all                   Intel Corporation
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