[Intel-gfx] [PATCH 1/2] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling)

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Thu Oct 3 13:16:03 UTC 2019


On 15/09/2019 19:45, Chris Wilson wrote:
> Make dma_fence_enable_sw_signaling() behave like its
> dma_fence_add_callback() and dma_fence_default_wait() counterparts and
> perform the test to enable signaling under the fence->lock, along with
> the action to do so. This ensure that should an implementation be trying
> to flush the cb_list (by signaling) on retirement before freeing the
> fence, it can do so in a race-free manner.
> 
> See also 0fc89b6802ba ("dma-fence: Simply wrap dma_fence_signal_locked
> with dma_fence_signal").
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
>   drivers/dma-buf/dma-fence.c | 11 +++++------
>   1 file changed, 5 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
> index 2c136aee3e79..587727089134 100644
> --- a/drivers/dma-buf/dma-fence.c
> +++ b/drivers/dma-buf/dma-fence.c
> @@ -285,19 +285,18 @@ void dma_fence_enable_sw_signaling(struct dma_fence *fence)
>   {
>   	unsigned long flags;
>   
> +	if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags))
> +		return;
> +
> +	spin_lock_irqsave(fence->lock, flags);
>   	if (!test_and_set_bit(DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT,

I dare not to ask if this couldn't be the non-atomic version, but I have 
empirically proven to myself things are not that straightforward around 
here.

>   			      &fence->flags) &&
> -	    !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags) &&
>   	    fence->ops->enable_signaling) {
>   		trace_dma_fence_enable_signal(fence);
> -
> -		spin_lock_irqsave(fence->lock, flags);
> -
>   		if (!fence->ops->enable_signaling(fence))
>   			dma_fence_signal_locked(fence);
> -
> -		spin_unlock_irqrestore(fence->lock, flags);
>   	}
> +	spin_unlock_irqrestore(fence->lock, flags);
>   }
>   EXPORT_SYMBOL(dma_fence_enable_sw_signaling);
>   
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>

Regards,

Tvrtko


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