[PATCH] drm/msm/a5xx: Fix barrier usage in set_preempt_state()

[Davidlohr Bueso]

Because it is not a Rmw operation, atomic_set() is never serialized,
and therefore the 'upgradable' smp_mb__{before,after}_atomic() calls
that order the write to preempt_state are completely bogus.

This patch replaces these with smp_mb(), which seems like the
original intent of when the code was written.

Signed-off-by: Davidlohr Bueso <dbueso at suse.de>
---
 drivers/gpu/drm/msm/adreno/a5xx_preempt.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
index 9cf9353a7ff1..d27d8d3208c6 100644
--- a/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_preempt.c
@@ -30,10 +30,10 @@ static inline void set_preempt_state(struct a5xx_gpu *gpu,
 	 * preemption or in the interrupt handler so barriers are needed
 	 * before...
 	 */
-	smp_mb__before_atomic();
+	smp_mb();
 	atomic_set(&gpu->preempt_state, new);
 	/* ... and after*/
-	smp_mb__after_atomic();
+	smp_mb();
 }
 
 /* Write the most recent wptr for the given ring into the hardware */
-- 
2.16.4