[PATCH] drm/amdgpu/display: fix build error casused by CONFIG_DRM_AMD_DC_DCN2_1

[Lakha, Bhawanpreet]

Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha at amd.com>

On 2019-10-15 12:51 p.m., Hersen Wu wrote:
> when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config,
> there is build error. struct dpm_clocks shoud not be
> guarded.
>
> Signed-off-by: Hersen Wu <hersenxs.wu at amd.com>
> ---
>   drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 3 ---
>   1 file changed, 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
> index 24d65dbbd749..ef7df9ef6d7e 100644
> --- a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
> +++ b/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
> @@ -249,8 +249,6 @@ struct pp_smu_funcs_nv {
>   };
>   #endif
>   
> -#if defined(CONFIG_DRM_AMD_DC_DCN2_1)
> -
>   #define PP_SMU_NUM_SOCCLK_DPM_LEVELS  8
>   #define PP_SMU_NUM_DCFCLK_DPM_LEVELS  8
>   #define PP_SMU_NUM_FCLK_DPM_LEVELS    4
> @@ -288,7 +286,6 @@ struct pp_smu_funcs_rn {
>   	enum pp_smu_status (*get_dpm_clock_table) (struct pp_smu *pp,
>   			struct dpm_clocks *clock_table);
>   };
> -#endif
>   
>   struct pp_smu_funcs {
>   	struct pp_smu ctx;