[PATCH 1/7] dt-bindings: gpu: pvrsgx: add initial bindings
H. Nikolaus Schaller
hns at goldelico.com
Tue Oct 22 16:14:38 UTC 2019
> Am 22.10.2019 um 17:36 schrieb Tony Lindgren <tony at atomide.com>:
> * H. Nikolaus Schaller <hns at goldelico.com> [191022 15:12]:
>> Hm. How should that work? Some SoC have the sgx544 as single
>> core and others as dual core. This imho does not fit into
>> the "img,sgx544-$revision" scheme which could be matched to.
> Well don't you have then just two separate child nodes,
> one for each core with their own register range?
Doesn't look so. AFAIK the architecture of SGX is that there
is a single scheduler which is accessed by the register range
and it internally has control over multiple cores.
> That is assuming they're really separate instances..
No. There is some internal magic in the driver. It just
needs to know that there is one or two nodes. Currently
this is handled by some #define option when calling the
My idea was to replace the #ifdef by checking for the
>> But maybe we do it the same as with the timer for the moment,
>> i.e. keep it in some unpublished patch set.
> Yeah makes sense to me until things get sorted out.
>> At the moment I have more problems understanding how the yaml
>> thing works. I understand and fully support the overall goal,
>> but it is quite difficult to get a start here. And there do not
>> seem to be tools or scripts to help converting from old style
>> text format (even if not perfect, this would be helpful) and
>> I have no yaml editor that helps keeping the indentation
>> correct. So this slows down a v2 a little bit.
> Sounds handy to me :)
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