[PATCH] drm/syncobj: extend syncobj query ability v3

Daniel Vetter daniel at ffwll.ch
Thu Oct 24 11:48:34 UTC 2019


On Wed, Oct 23, 2019 at 10:22 PM Sean Paul <sean at poorly.run> wrote:
>
> On Tue, Jul 30, 2019 at 9:22 AM Chunming Zhou <zhoucm1 at amd.com> wrote:
> >
> >
> > 在 2019/7/30 21:17, Koenig, Christian 写道:
> > > Am 30.07.19 um 15:02 schrieb Chunming Zhou:
> > >> user space needs a flexiable query ability.
> > >> So that umd can get last signaled or submitted point.
> > >> v2:
> > >> add sanitizer checking.
> > >> v3:
> > >> rebase
> > >>
> > >> Change-Id: I6512b430524ebabe715e602a2bf5abb0a7e780ea
> > >> Signed-off-by: Chunming Zhou <david1.zhou at amd.com>
> > >> Cc: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> > >> Cc: Christian König <Christian.Koenig at amd.com>
> > >> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> > > Reviewed-by: Christian König <cristian.koenig at amd.com>
> > >
> > > Lionel is the Intel code using this already public? Or David any chance
> > > that we can get a public amdvlk release using this?
> >
> > In latest public amdvlk, We should be able to see how timeline syncobj
> > is used in it.
> >
>
> I couldn't find this anywhere, could you please provide a link?

I thought there was also a radv implementation somewhere ... adding
some of the usual suspects for that.
-Daniel

>
> Sean
>
> >
> > -David
> >
> > >
> > > Christian.
> > >
> > >> ---
> > >>    drivers/gpu/drm/drm_syncobj.c | 37 +++++++++++++++++++++--------------
> > >>    include/uapi/drm/drm.h        |  3 ++-
> > >>    2 files changed, 24 insertions(+), 16 deletions(-)
> > >>
> > >> diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
> > >> index cecff2e447b1..d4432f1513ac 100644
> > >> --- a/drivers/gpu/drm/drm_syncobj.c
> > >> +++ b/drivers/gpu/drm/drm_syncobj.c
> > >> @@ -1197,7 +1197,7 @@ drm_syncobj_timeline_signal_ioctl(struct drm_device *dev, void *data,
> > >>      if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ_TIMELINE))
> > >>              return -EOPNOTSUPP;
> > >>
> > >> -    if (args->pad != 0)
> > >> +    if (args->flags != 0)
> > >>              return -EINVAL;
> > >>
> > >>      if (args->count_handles == 0)
> > >> @@ -1268,7 +1268,7 @@ int drm_syncobj_query_ioctl(struct drm_device *dev, void *data,
> > >>      if (!drm_core_check_feature(dev, DRIVER_SYNCOBJ_TIMELINE))
> > >>              return -EOPNOTSUPP;
> > >>
> > >> -    if (args->pad != 0)
> > >> +    if (args->flags & ~DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED)
> > >>              return -EINVAL;
> > >>
> > >>      if (args->count_handles == 0)
> > >> @@ -1289,25 +1289,32 @@ int drm_syncobj_query_ioctl(struct drm_device *dev, void *data,
> > >>              fence = drm_syncobj_fence_get(syncobjs[i]);
> > >>              chain = to_dma_fence_chain(fence);
> > >>              if (chain) {
> > >> -                    struct dma_fence *iter, *last_signaled = NULL;
> > >> -
> > >> -                    dma_fence_chain_for_each(iter, fence) {
> > >> -                            if (iter->context != fence->context) {
> > >> -                                    dma_fence_put(iter);
> > >> -                                    /* It is most likely that timeline has
> > >> -                                     * unorder points. */
> > >> -                                    break;
> > >> +                    struct dma_fence *iter, *last_signaled =
> > >> +                            dma_fence_get(fence);
> > >> +
> > >> +                    if (args->flags &
> > >> +                        DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED) {
> > >> +                            point = fence->seqno;
> > >> +                    } else {
> > >> +                            dma_fence_chain_for_each(iter, fence) {
> > >> +                                    if (iter->context != fence->context) {
> > >> +                                            dma_fence_put(iter);
> > >> +                                            /* It is most likely that timeline has
> > >> +                                            * unorder points. */
> > >> +                                            break;
> > >> +                                    }
> > >> +                                    dma_fence_put(last_signaled);
> > >> +                                    last_signaled = dma_fence_get(iter);
> > >>                              }
> > >> -                            dma_fence_put(last_signaled);
> > >> -                            last_signaled = dma_fence_get(iter);
> > >> +                            point = dma_fence_is_signaled(last_signaled) ?
> > >> +                                    last_signaled->seqno :
> > >> +                                    to_dma_fence_chain(last_signaled)->prev_seqno;
> > >>                      }
> > >> -                    point = dma_fence_is_signaled(last_signaled) ?
> > >> -                            last_signaled->seqno :
> > >> -                            to_dma_fence_chain(last_signaled)->prev_seqno;
> > >>                      dma_fence_put(last_signaled);
> > >>              } else {
> > >>                      point = 0;
> > >>              }
> > >> +            dma_fence_put(fence);
> > >>              ret = copy_to_user(&points[i], &point, sizeof(uint64_t));
> > >>              ret = ret ? -EFAULT : 0;
> > >>              if (ret)
> > >> diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
> > >> index 661d73f9a919..fd987ce24d9f 100644
> > >> --- a/include/uapi/drm/drm.h
> > >> +++ b/include/uapi/drm/drm.h
> > >> @@ -777,11 +777,12 @@ struct drm_syncobj_array {
> > >>      __u32 pad;
> > >>    };
> > >>
> > >> +#define DRM_SYNCOBJ_QUERY_FLAGS_LAST_SUBMITTED (1 << 0) /* last available point on timeline syncobj */
> > >>    struct drm_syncobj_timeline_array {
> > >>      __u64 handles;
> > >>      __u64 points;
> > >>      __u32 count_handles;
> > >> -    __u32 pad;
> > >> +    __u32 flags;
> > >>    };
> > >>
> > >>
> > _______________________________________________
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> > dri-devel at lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/dri-devel
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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