[PATCH v2 12/21] drm/dp: Read AUX read interval from DPCD
Thierry Reding
thierry.reding at gmail.com
Mon Sep 2 11:31:12 UTC 2019
From: Thierry Reding <treding at nvidia.com>
Store the AUX read interval from DPCD, so that it can be used to wait
for the durations given in the specification during link training.
v2: use USEC_PER_MSEC instead of MSEC_PER_SEC for clarity
Signed-off-by: Thierry Reding <treding at nvidia.com>
---
drivers/gpu/drm/drm_dp_helper.c | 3 +++
include/drm/drm_dp_helper.h | 35 +++++++++++++++++++++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 5b36e8e39ca7..4112570dbe67 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -382,6 +382,7 @@ static void drm_dp_link_reset(struct drm_dp_link *link)
link->max_lanes = 0;
drm_dp_link_caps_reset(&link->caps);
+ link->aux_rd_interval = 0;
link->edp = 0;
link->rate = 0;
@@ -435,6 +436,8 @@ int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
link->edp = edp_revs[value];
}
+ link->aux_rd_interval = drm_dp_aux_rd_interval(values);
+
link->rate = link->max_rate;
link->lanes = link->max_lanes;
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 13c50e905205..e28b0941a8be 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -25,8 +25,11 @@
#include <linux/delay.h>
#include <linux/i2c.h>
+#include <linux/time64.h>
#include <linux/types.h>
+#include <drm/drm_print.h>
+
/*
* Unless otherwise noted, all values are from the DP 1.1a spec. Note that
* DP and DPCD versions are independent. Differences from 1.0 are not noted,
@@ -1229,6 +1232,36 @@ drm_dp_alternate_scrambler_reset_cap(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
DP_ALTERNATE_SCRAMBLER_RESET_CAP;
}
+/**
+ * drm_dp_read_aux_interval() - read the AUX read interval from the DPCD
+ * @dpcd: receiver capacity buffer
+ *
+ * Reads the AUX read interval (in microseconds) from the DPCD. Note that the
+ * TRAINING_AUX_RD_INTERVAL stores the value in units of 4 milliseconds. If no
+ * read interval is specified and for DPCD v1.4 and later, the read interval
+ * is always 100 microseconds.
+ *
+ * Returns:
+ * The read AUX interval in microseconds.
+ */
+static inline unsigned int
+drm_dp_aux_rd_interval(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ unsigned int rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
+ DP_TRAINING_AUX_RD_MASK;
+
+ if (rd_interval > 4)
+ DRM_DEBUG_KMS("AUX interval %u, out of range (max: 4)\n",
+ rd_interval);
+
+ if (rd_interval > 0 && dpcd[DP_DPCD_REV] < DP_DPCD_REV_14)
+ rd_interval *= 4 * USEC_PER_MSEC;
+ else
+ rd_interval = 100;
+
+ return rd_interval;
+}
+
/*
* DisplayPort AUX channel
*/
@@ -1405,6 +1438,7 @@ void drm_dp_link_caps_copy(struct drm_dp_link_caps *dest,
* @max_rate: maximum clock rate supported on the link
* @max_lanes: maximum number of lanes supported on the link
* @caps: capabilities supported on the link (see &drm_dp_link_caps)
+ * @aux_rd_interval: AUX read interval to use for training (in microseconds)
* @edp: eDP revision (0x11: eDP 1.1, 0x12: eDP 1.2, ...)
* @rate: currently configured link rate
* @lanes: currently configured number of lanes
@@ -1415,6 +1449,7 @@ struct drm_dp_link {
unsigned int max_lanes;
struct drm_dp_link_caps caps;
+ unsigned int aux_rd_interval;
unsigned char edp;
unsigned int rate;
--
2.22.0
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