[PATCH V5] drm: Add link training repeaters addresses

[Siqueira, Rodrigo]

Please, ignore this patch.

I just noticed that I sent the wrong version. I resend the correct patch
with the title:

[PATCH V5] drm: Add definitions for link training repeaters

Sorry for this mistake.

On 09/09, Siqueira, Rodrigo wrote:
> DP 1.3 specification introduces the Link Training-tunable PHY Repeater,
> and DP 1.4* supplemented it with new features. In the 1.4a spec, it was
> introduced some innovations to make handy to add support for systems
> with Thunderbolt or other repeater devices.
> 
> It is important to highlight that DP specification had some updates from
> 1.3 through 1.4a. In particular, DP 1.4 defines Repeater_FEC_CAPABILITY
> at the address 0xf0004, and DP 1.4a redefined the address 0xf0004 to
> DP_MAX_LANE_COUNT_PHY_REPEATER.
> 
> Changes since V4:
> - Update commit message
> - Fix misleading comments related to the spec version
> Changes since V3:
> - Replace spaces by tabs
> Changes since V2:
> - Drop the kernel-doc comment
> - Reorder LTTPR according to register offset
> Changes since V1:
> - Adjusts registers names to be aligned with spec and the rest of the
>   file
> - Update spec comment from 1.4 to 1.4a
> 
> Cc: Abdoulaye Berthe <Abdoulaye.Berthe at amd.com>
> Cc: Harry Wentland <harry.wentland at amd.com>
> Cc: Leo Li <sunpeng.li at amd.com>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare at intel.com>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira at amd.com>
> Signed-off-by: Abdoulaye Berthe <Abdoulaye.Berthe at amd.com>
> Reviewed-by: Harry Wentland <Harry.Wentland at amd.com>
> ---
>  include/drm/drm_dp_helper.h | 26 ++++++++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 7972b925a952..fddcd84601f8 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -966,6 +966,32 @@
>  #define DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET	0x69494
>  #define DP_HDCP_2_2_REG_DBG_OFFSET		0x69518
>  
> +/* Link Training (LT)-tunable PHY Repeaters */
> +#define DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV 0xf0000 /* 1.3 */
> +#define DP_MAX_LINK_RATE_PHY_REPEATER			    0xf0001 /* 1.4a */
> +#define DP_PHY_REPEATER_CNT				    0xf0002 /* 1.3 */
> +#define DP_PHY_REPEATER_MODE				    0xf0003 /* 1.3 */
> +#define DP_MAX_LANE_COUNT_PHY_REPEATER			    0xf0004 /* 1.4a */
> +#define DP_Repeater_FEC_CAPABILITY			    0xf0004 /* 1.4 */
> +#define DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT		    0xf0005 /* 1.4a */
> +#define DP_TRAINING_PATTERN_SET_PHY_REPEATER1		    0xf0010 /* 1.3 */
> +#define DP_TRAINING_LANE0_SET_PHY_REPEATER1		    0xf0011 /* 1.3 */
> +#define DP_TRAINING_LANE1_SET_PHY_REPEATER1		    0xf0012 /* 1.3 */
> +#define DP_TRAINING_LANE2_SET_PHY_REPEATER1		    0xf0013 /* 1.3 */
> +#define DP_TRAINING_LANE3_SET_PHY_REPEATER1		    0xf0014 /* 1.3 */
> +#define DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1	    0xf0020 /* 1.4a */
> +#define DP_TRANSMITTER_CAPABILITY_PHY_REPEATER1		    0xf0021 /* 1.4a */
> +#define DP_LANE0_1_STATUS_PHY_REPEATER1			    0xf0030 /* 1.3 */
> +#define DP_LANE2_3_STATUS_PHY_REPEATER1			    0xf0031 /* 1.3 */
> +#define DP_LANE_ALIGN_STATUS_UPDATED_PHY_REPEATER1	    0xf0032 /* 1.3 */
> +#define DP_ADJUST_REQUEST_LANE0_1_PHY_REPEATER1		    0xf0033 /* 1.3 */
> +#define DP_ADJUST_REQUEST_LANE2_3_PHY_REPEATER1		    0xf0034 /* 1.3 */
> +#define DP_SYMBOL_ERROR_COUNT_LANE0_PHY_REPEATER1	    0xf0035 /* 1.3 */
> +#define DP_SYMBOL_ERROR_COUNT_LANE1_PHY_REPEATER1	    0xf0037 /* 1.3 */
> +#define DP_SYMBOL_ERROR_COUNT_LANE2_PHY_REPEATER1	    0xf0039 /* 1.3 */
> +#define DP_SYMBOL_ERROR_COUNT_LANE3_PHY_REPEATER1	    0xf003b /* 1.3 */
> +#define DP_FEC_STATUS_PHY_REPEATER1			    0xf0290 /* 1.4 */
> +
>  /* DP HDCP message start offsets in DPCD address space */
>  #define DP_HDCP_2_2_AKE_INIT_OFFSET		DP_HDCP_2_2_REG_RTX_OFFSET
>  #define DP_HDCP_2_2_AKE_SEND_CERT_OFFSET	DP_HDCP_2_2_REG_CERT_RX_OFFSET
> -- 
> 2.23.0



-- 
Rodrigo Siqueira
Software Engineer, Advanced Micro Devices (AMD)
https://siqueira.tech
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