[PATCH 2/2] drm/mgag200: Add vblank support

Thomas Zimmermann tzimmermann at suse.de
Wed Sep 11 17:31:10 UTC 2019


Hi

Am 11.09.19 um 17:21 schrieb Ville Syrjälä:
> On Wed, Sep 11, 2019 at 05:08:45PM +0200, Thomas Zimmermann wrote:
>> Hi
>>
>> Am 10.09.19 um 16:01 schrieb Ville Syrjälä:
>>> On Mon, Sep 09, 2019 at 04:06:33PM +0200, Thomas Zimmermann wrote:
>>>> Support for vblank requires VSYNC to signal an interrupt, which is broken
>>>> on Matrox chipsets.
>>>
>>> I don't remember there being anything wrong with the vsync interrupt.
>>> What makes you think it's broken?
>>>
>>>> The workaround that is used here and in other free
>>>> Matrox drivers is to program <linecomp> to the value of <vdisplay> and
>>>> enable the VLINE interrupt. This triggers an interrupt at the same time
>>>> when VSYNC begins.
>>>
>>> You're programming it to fire at start of vblank, not start of vsync.
>>>
>>>>
>>>> VLINE uses separate registers for enabling and clearing pending interrupts.
>>>> No extra syncronization between irq handler and the rest of the driver is
>>>> required.
>>>>
>>>> Signed-off-by: Thomas Zimmermann <tzimmermann at suse.de>
>>>> ---
>>>>  drivers/gpu/drm/mgag200/mgag200_drv.c  |  1 +
>>>>  drivers/gpu/drm/mgag200/mgag200_drv.h  |  1 +
>>>>  drivers/gpu/drm/mgag200/mgag200_main.c | 33 ++++++++++++++++++++
>>>>  drivers/gpu/drm/mgag200/mgag200_mode.c | 42 +++++++++++++++++++++++---
>>>>  4 files changed, 73 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.c b/drivers/gpu/drm/mgag200/mgag200_drv.c
>>>> index 4f9df3b93598..cff265973154 100644
>>>> --- a/drivers/gpu/drm/mgag200/mgag200_drv.c
>>>> +++ b/drivers/gpu/drm/mgag200/mgag200_drv.c
>>>> @@ -67,6 +67,7 @@ static struct drm_driver driver = {
>>>>  	.driver_features = DRIVER_GEM | DRIVER_MODESET,
>>>>  	.load = mgag200_driver_load,
>>>>  	.unload = mgag200_driver_unload,
>>>> +	.irq_handler = mgag200_irq_handler,
>>>>  	.fops = &mgag200_driver_fops,
>>>>  	.name = DRIVER_NAME,
>>>>  	.desc = DRIVER_DESC,
>>>> diff --git a/drivers/gpu/drm/mgag200/mgag200_drv.h b/drivers/gpu/drm/mgag200/mgag200_drv.h
>>>> index 1c93f8dc08c7..88cf256d135f 100644
>>>> --- a/drivers/gpu/drm/mgag200/mgag200_drv.h
>>>> +++ b/drivers/gpu/drm/mgag200/mgag200_drv.h
>>>> @@ -195,6 +195,7 @@ void mgag200_modeset_fini(struct mga_device *mdev);
>>>>  				/* mgag200_main.c */
>>>>  int mgag200_driver_load(struct drm_device *dev, unsigned long flags);
>>>>  void mgag200_driver_unload(struct drm_device *dev);
>>>> +irqreturn_t mgag200_irq_handler(int irq, void *arg);
>>>>  
>>>>  				/* mgag200_i2c.c */
>>>>  struct mga_i2c_chan *mgag200_i2c_create(struct drm_device *dev);
>>>> diff --git a/drivers/gpu/drm/mgag200/mgag200_main.c b/drivers/gpu/drm/mgag200/mgag200_main.c
>>>> index a9773334dedf..5941607796e8 100644
>>>> --- a/drivers/gpu/drm/mgag200/mgag200_main.c
>>>> +++ b/drivers/gpu/drm/mgag200/mgag200_main.c
>>>> @@ -10,7 +10,9 @@
>>>>  
>>>>  #include <drm/drm_crtc_helper.h>
>>>>  #include <drm/drm_gem_framebuffer_helper.h>
>>>> +#include <drm/drm_irq.h>
>>>>  #include <drm/drm_pci.h>
>>>> +#include <drm/drm_vblank.h>
>>>>  
>>>>  #include "mgag200_drv.h"
>>>>  
>>>> @@ -186,10 +188,18 @@ int mgag200_driver_load(struct drm_device *dev, unsigned long flags)
>>>>  	}
>>>>  	mdev->cursor.pixels_current = NULL;
>>>>  
>>>> +	r = drm_vblank_init(dev, 1);
>>>> +	if (r)
>>>> +		goto err_modeset;
>>>> +
>>>>  	r = drm_fbdev_generic_setup(mdev->dev, 0);
>>>>  	if (r)
>>>>  		goto err_modeset;
>>>>  
>>>> +	r = drm_irq_install(dev, dev->pdev->irq);
>>>> +	if (r)
>>>> +		goto err_modeset;
>>>> +
>>>>  	return 0;
>>>>  
>>>>  err_modeset:
>>>> @@ -207,8 +217,31 @@ void mgag200_driver_unload(struct drm_device *dev)
>>>>  
>>>>  	if (mdev == NULL)
>>>>  		return;
>>>> +	drm_irq_uninstall(dev);
>>>>  	mgag200_modeset_fini(mdev);
>>>>  	drm_mode_config_cleanup(dev);
>>>>  	mgag200_mm_fini(mdev);
>>>>  	dev->dev_private = NULL;
>>>>  }
>>>> +
>>>> +irqreturn_t mgag200_irq_handler(int irq, void *arg)
>>>> +{
>>>> +	struct drm_device *dev = arg;
>>>> +	struct mga_device *mdev = dev->dev_private;
>>>> +	struct drm_crtc *crtc;
>>>> +	u32 status, iclear;
>>>> +
>>>> +	status = RREG32(0x1e14);
>>>> +
>>>> +	if (status & 0x00000020) { /* test <vlinepen> */
>>>> +		drm_for_each_crtc(crtc, dev) {
>>>> +			drm_crtc_handle_vblank(crtc);
>>>> +		}
>>>
>>> A bit odd way to write that but as long this driver doesn't support
>>> crtc2 it should be fine.
>>>
>>>> +		iclear = RREG32(0x1e18);
>>>> +		iclear |= 0x00000020; /* set <vlineiclr> */
>>>> +		WREG32(0x1e18, iclear);
>>>> +		return IRQ_HANDLED;
>>>> +	}
>>>> +
>>>> +	return IRQ_NONE;
>>>> +};
>>>> diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
>>>> index 5e778b5f1a10..ffe5f15d0a7d 100644
>>>> --- a/drivers/gpu/drm/mgag200/mgag200_mode.c
>>>> +++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
>>>> @@ -905,6 +905,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
>>>>  	const struct drm_framebuffer *fb = crtc->primary->fb;
>>>>  	int hdisplay, hsyncstart, hsyncend, htotal;
>>>>  	int vdisplay, vsyncstart, vsyncend, vtotal;
>>>> +	int linecomp;
>>>>  	int pitch;
>>>>  	int option = 0, option2 = 0;
>>>>  	int i;
>>>> @@ -1042,6 +1043,13 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
>>>>  	vsyncend = mode->vsync_end - 1;
>>>>  	vtotal = mode->vtotal - 2;
>>>>  
>>>> +	/* The VSYNC interrupt is broken on Matrox chipsets. We use
>>>> +	 * the VLINE interrupt instead. It triggers when the current
>>>> +	 * linecomp has been reached. Therefore keep <linecomp> in
>>>> +	 * sync with <vdisplay>.
>>>> +	 */
>>>> +	linecomp = vdisplay;
>>>
>>> I have an odd recollection that you want vdisplay+1 here if you
>>> want the interrupt to fire at the correct time.
>>
>> I double-checked and found that vdisplay is the value originally used by
>> this driver, by the fbdev driver and by Xorg's mga driver.
> 
> Sure, but what does the hardware actually want?
> 

I set linecomp to vdisplay+1 and got a DRM warning about missing a
vblank event.

Best regards
Thomas


-- 
Thomas Zimmermann
Graphics Driver Developer
SUSE Linux GmbH, Maxfeldstrasse 5, 90409 Nuernberg, Germany
GF: Felix Imendörffer, Mary Higgins, Sri Rasiah
HRB 21284 (AG Nürnberg)

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