[Intel-gfx] [PATCH 01/12] drm/dp: Add definitons for MSA MISC bits
Mun, Gwan-gyeong
gwan-gyeong.mun at intel.com
Wed Sep 18 18:55:30 UTC 2019
On Thu, 2019-07-18 at 17:50 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Add definitions for the MSA (Main Stream Attribute) MISC bits. On
> some hardware you can program these directly into a register.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
> include/drm/drm_dp_helper.h | 42
> +++++++++++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> diff --git a/include/drm/drm_dp_helper.h
> b/include/drm/drm_dp_helper.h
> index 397896b5b21a..d3f429795fea 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -42,6 +42,48 @@
> * 1.2 formally includes both eDP and DPI definitions.
> */
>
> +/* MSA (Main Stream Attribute) MISC bits (as MISC1<<8|MISC0) */
> +#define DP_MSA_MISC_SYNC_CLOCK (1 << 0)
> +#define DP_MSA_MISC_INTERLACE_VTOTAL_EVEN (1 << 8)
> +#define DP_MSA_MISC_STEREO_NO_3D (0 << 9)
> +#define DP_MSA_MISC_STEREO_PROG_RIGHT_EYE (1 << 9)
> +#define DP_MSA_MISC_STEREO_PROG_LEFT_EYE (3 << 9)
> +/* bits per component for non-RAW */
> +#define DP_MSA_MISC_6_BPC (0 << 5)
> +#define DP_MSA_MISC_8_BPC (1 << 5)
> +#define DP_MSA_MISC_10_BPC (2 << 5)
> +#define DP_MSA_MISC_12_BPC (3 << 5)
> +#define DP_MSA_MISC_16_BPC (4 << 5)
> +/* bits per component for RAW */
> +#define DP_MSA_MISC_RAW_6_BPC (1 << 5)
> +#define DP_MSA_MISC_RAW_7_BPC (2 << 5)
> +#define DP_MSA_MISC_RAW_8_BPC (3 << 5)
> +#define DP_MSA_MISC_RAW_10_BPC (4 << 5)
> +#define DP_MSA_MISC_RAW_12_BPC (5 << 5)
> +#define DP_MSA_MISC_RAW_14_BPC (6 << 5)
> +#define DP_MSA_MISC_RAW_16_BPC (7 << 5)
> +/* pixel encoding/colorimetry format */
> +#define _DP_MSA_MISC_COLOR(misc1_7, misc0_21, misc0_3, misc0_4) \
> + ((misc1_7) << 15 | (misc0_4) << 4 | (misc0_3) << 3 |
> ((misc0_21) << 1))
> +#define DP_MSA_MISC_COLOR_RGB _DP_MSA_MISC_CO
> LOR(0, 0, 0, 0)
> +#define DP_MSA_MISC_COLOR_CEA_RGB _DP_MSA_MISC_COLOR(0,
> 0, 1, 0)
> +#define DP_MSA_MISC_COLOR_RGB_WIDE_FIXED _DP_MSA_MISC_COLOR(0,
> 3, 0, 0)
> +#define DP_MSA_MISC_COLOR_RGB_WIDE_FLOAT _DP_MSA_MISC_COLOR(0,
> 3, 0, 1)
> +#define DP_MSA_MISC_COLOR_Y_ONLY _DP_MSA_MISC_COLOR(1,
> 0, 0, 0)
> +#define DP_MSA_MISC_COLOR_RAW _DP_MSA_MISC_CO
> LOR(1, 1, 0, 0)
> +#define DP_MSA_MISC_COLOR_YCBCR_422_BT601 _DP_MSA_MISC_COLOR(0,
> 1, 1, 0)
> +#define DP_MSA_MISC_COLOR_YCBCR_422_BT709 _DP_MSA_MISC_COLOR(0,
> 1, 1, 1)
> +#define DP_MSA_MISC_COLOR_YCBCR_444_BT601 _DP_MSA_MISC_COLOR(0,
> 2, 1, 0)
> +#define DP_MSA_MISC_COLOR_YCBCR_444_BT709 _DP_MSA_MISC_COLOR(0,
> 2, 1, 1)
> +#define DP_MSA_MISC_COLOR_XVYCC_422_BT601 _DP_MSA_MISC_COLOR(0,
> 1, 0, 0)
> +#define DP_MSA_MISC_COLOR_XVYCC_422_BT709 _DP_MSA_MISC_COLOR(0,
> 1, 0, 1)
> +#define DP_MSA_MISC_COLOR_XVYCC_444_BT601 _DP_MSA_MISC_COLOR(0,
> 2, 0, 0)
> +#define DP_MSA_MISC_COLOR_XVYCC_444_BT709 _DP_MSA_MISC_COLOR(0,
> 2, 0, 1)
> +#define DP_MSA_MISC_COLOR_OPRGB _DP_MSA_MISC_CO
> LOR(0, 0, 1, 1)
> +#define DP_MSA_MISC_COLOR_DCI_P3 _DP_MSA_MISC_COLOR(0,
> 3, 1, 0)
> +#define DP_MSA_MISC_COLOR_COLOR_PROFILE _DP_MSA_MISC_CO
> LOR(0, 3, 1, 1)
> +#define DP_MSA_MISC_COLOR_VSC_SDP (1 << 14)
> +
> #define DP_AUX_MAX_PAYLOAD_BYTES 16
>
> #define DP_AUX_I2C_WRITE 0x0
>
The changes look good to me.
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun at intel.com>
> --
> 2.21.0
>
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