[PATCH 1/3] drm: Add some new format DRM_FORMAT_NVXX_10

[Daniel Vetter]

On Wed, Sep 25, 2019 at 10:07 AM Sandy Huang <hjc at rock-chips.com> wrote:
>
> These new format is supported by some rockchip socs:
>
> DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10
> DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10
> DRM_FORMAT_NV24_10/DRM_FORMAT_NV42_10
>
> Signed-off-by: Sandy Huang <hjc at rock-chips.com>

Again, please use the block formats to describe these, plus proper
comments as Maarten also asked for.
-Daniel

> ---
>  drivers/gpu/drm/drm_fourcc.c  | 18 ++++++++++++++++++
>  include/uapi/drm/drm_fourcc.h | 14 ++++++++++++++
>  2 files changed, 32 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
> index c630064..f25fa81 100644
> --- a/drivers/gpu/drm/drm_fourcc.c
> +++ b/drivers/gpu/drm/drm_fourcc.c
> @@ -274,6 +274,24 @@ const struct drm_format_info *__drm_format_info(u32 format)
>                 { .format = DRM_FORMAT_YUV420_10BIT,    .depth = 0,
>                   .num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2,
>                   .is_yuv = true },
> +               { .format = DRM_FORMAT_NV12_10,         .depth = 0,
> +                 .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2,
> +                 .is_yuv = true },
> +               { .format = DRM_FORMAT_NV21_10,         .depth = 0,
> +                 .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2,
> +                 .is_yuv = true },
> +               { .format = DRM_FORMAT_NV16_10,         .depth = 0,
> +                 .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 1,
> +                 .is_yuv = true },
> +               { .format = DRM_FORMAT_NV61_10,         .depth = 0,
> +                 .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 1,
> +                 .is_yuv = true },
> +               { .format = DRM_FORMAT_NV24_10,         .depth = 0,
> +                 .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1,
> +                 .is_yuv = true },
> +               { .format = DRM_FORMAT_NV42_10,         .depth = 0,
> +                 .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1,
> +                 .is_yuv = true },
>         };
>
>         unsigned int i;
> diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
> index 3feeaa3..0479f47 100644
> --- a/include/uapi/drm/drm_fourcc.h
> +++ b/include/uapi/drm/drm_fourcc.h
> @@ -238,6 +238,20 @@ extern "C" {
>  #define DRM_FORMAT_NV42                fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */
>
>  /*
> + * 2 plane YCbCr 10bit
> + * index 0 = Y plane, [9:0] Y
> + * index 1 = Cr:Cb plane, [19:0]
> + * or
> + * index 1 = Cb:Cr plane, [19:0]
> + */
> +#define DRM_FORMAT_NV12_10     fourcc_code('N', 'A', '1', '2') /* 2x2 subsampled Cr:Cb plane */
> +#define DRM_FORMAT_NV21_10     fourcc_code('N', 'A', '2', '1') /* 2x2 subsampled Cb:Cr plane */
> +#define DRM_FORMAT_NV16_10     fourcc_code('N', 'A', '1', '6') /* 2x1 subsampled Cr:Cb plane */
> +#define DRM_FORMAT_NV61_10     fourcc_code('N', 'A', '6', '1') /* 2x1 subsampled Cb:Cr plane */
> +#define DRM_FORMAT_NV24_10     fourcc_code('N', 'A', '2', '4') /* non-subsampled Cr:Cb plane */
> +#define DRM_FORMAT_NV42_10     fourcc_code('N', 'A', '4', '2') /* non-subsampled Cb:Cr plane */
> +
> +/*
>   * 2 plane YCbCr MSB aligned
>   * index 0 = Y plane, [15:0] Y:x [10:6] little endian
>   * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian
> --
> 2.7.4
>
>
>


-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch