[PATCH v7 0/9] Support dsi for mt8183
CK Hu
ck.hu at mediatek.com
Fri Sep 27 01:35:56 UTC 2019
Hi, Jitao:
For this series, applied to mediatek-drm-next-5.5 [1], thanks.
[1]
https://github.com/ckhu-mediatek/linux.git-tags/commits/mediatek-drm-next-5.5
Regards,
CK
On Thu, 2019-09-19 at 14:57 +0800, Jitao Shi wrote:
> Changes since v6:
> - add dphy reset to avoid dphy fifo error after lines number setting
> - separate dsi cmd reg setting from "fixes CMDQ reg address of mt8173
> is different with mt2701"
>
> Changes since v5:
> - fine tune dphy timing.
>
> Changes since v4:
> - move mipi_dsi_host_unregiter() to .remove()
> - fine tune add frame size control coding style
> - change the data type of data_rate as u32, and add DIV_ROUND_UP_ULL
> - use div_u64 when 8000000000ULL / dsi->data_rate.
>
> Changes since v3
> - add one more 'tab' for bitwise define.
> - add Tested-by: Ryan Case <ryandcase at chromium.org>
> and Reviewed-by: CK Hu <ck.hu at mediatek.com>.
> - remove compare da_hs_zero to da_hs_prepare.
>
> Changes since v2:
> - change the video timing calc method
> - fine the dsi and mipitx init sequence
> - fine tune commit msg
>
> Changes since v1:
> - separate frame size and reg commit control independent patches.
> - fix some return values in probe
> - remove DSI_CMDW0 in "CMDQ reg address of mt8173 is different with mt2701"
>
> Jitao Shi (9):
> drm/mediatek: move mipi_dsi_host_register to probe
> drm/mediatek: fixes CMDQ reg address of mt8173 is different with
> mt2701
> drm/mediatek: replace writeb() with mtk_dsi_mask()
> drm/mediatek: add dsi reg commit disable control
> drm/mediatek: add frame size control
> drm/mediatek: add mt8183 dsi driver support
> drm/mediatek: change the dsi phytiming calculate method
> drm: mediatek: adjust dsi and mipi_tx probe sequence
> drm/mediatek: add dphy reset after setting lanes number
>
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
> drivers/gpu/drm/mediatek/mtk_dsi.c | 233 ++++++++++++++++++-------
> 2 files changed, 170 insertions(+), 65 deletions(-)
>
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