[PATCH 2/2] drm/panfrost: Use coherent pagetable walk on Juno
robh at kernel.org
Mon Sep 30 17:52:36 UTC 2019
On Mon, Sep 30, 2019 at 11:26 AM Steven Price <steven.price at arm.com> wrote:
> On 30/09/2019 16:24, Robin Murphy wrote:
> > Although going full "dma-coherent" ends badly due to GEM objects still
> > being forcibly mapped non-cacheable, we can at least take advantage of
> > Juno's ACE-lite integration to skip cache maintenance for pagetables.
> > CC: Rob Herring <robh at kernel.org>
> > CC: Tomeu Vizoso <tomeu.vizoso at collabora.com>
> > Signed-off-by: Robin Murphy <robin.murphy at arm.com>
> > ---
> > This isn't really meant as a series, I'm just sending it together
> > with patch #1 for context.
> > drivers/gpu/drm/panfrost/panfrost_mmu.c | 3 +++
> > 1 file changed, 3 insertions(+)
> > diff --git a/drivers/gpu/drm/panfrost/panfrost_mmu.c b/drivers/gpu/drm/panfrost/panfrost_mmu.c
> > index bdd990568476..560439f63277 100644
> > --- a/drivers/gpu/drm/panfrost/panfrost_mmu.c
> > +++ b/drivers/gpu/drm/panfrost/panfrost_mmu.c
> > @@ -365,6 +365,9 @@ int panfrost_mmu_pgtable_alloc(struct panfrost_file_priv *priv)
> > .iommu_dev = pfdev->dev,
> > };
> > + if (of_device_is_compatible(pfdev->dev->of_node, "arm,juno-mali"))
> > + pfdev->mmu->pgtbl_cfg.coherent_walk = true;
> Should be:
> mmu->pgtbl_cfg.coherent_walk = true;
IOW, base this on 5.4 or drm-misc-next.
> Also I'm not sure whether we should do this based on a compatible
> string. kbase has a "system-coherency" device-tree flag for it. In
> theory we could end up with a long list of compatibles here...
Why not use 'dma-coherent' which you set? If not, I'm confused as to
what 'dma-coherent' is supposed to mean. Is it possible for page table
walks to have different coherency than the rest of the accesses?
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