[PATCH] amdgpu: fix gcc-4.8 build warnings
Arnd Bergmann
arnd at arndb.de
Tue Apr 28 21:54:27 UTC 2020
Older compilers warn about initializers with incorrect curly
braces:
drivers/gpu/drm/drm_dp_mst_topology.c: In function 'drm_dp_mst_dsc_aux_for_port':
drivers/gpu/drm/drm_dp_mst_topology.c:5497:9: error: missing braces around initializer [-Werror=missing-braces]
struct drm_dp_desc desc = { 0 };
^
Change all instances in the amd gpu driver to using the GNU empty
initializer extension.
Signed-off-by: Arnd Bergmann <arnd at arndb.de>
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +-
drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c | 2 +-
drivers/gpu/drm/amd/display/dc/bios/command_table2.c | 4 ++--
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 6 +++---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 6 +++---
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 2 +-
drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c | 8 ++++----
8 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 7f4417981bff..81ce3103d751 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -8695,7 +8695,7 @@ bool amdgpu_dm_psr_enable(struct dc_stream_state *stream)
{
struct dc_link *link = stream->link;
unsigned int vsync_rate_hz = 0;
- struct dc_static_screen_params params = {0};
+ struct dc_static_screen_params params = { };
/* Calculate number of static frames before generating interrupt to
* enter PSR.
*/
diff --git a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
index 37fa7b48250e..5484a316eaa8 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/bios_parser2.c
@@ -294,7 +294,7 @@ static enum bp_result bios_parser_get_i2c_info(struct dc_bios *dcb,
struct atom_display_object_path_v2 *object;
struct atom_common_record_header *header;
struct atom_i2c_record *record;
- struct atom_i2c_record dummy_record = {0};
+ struct atom_i2c_record dummy_record = { };
struct bios_parser *bp = BP_FROM_DCB(dcb);
if (!info)
diff --git a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
index 8edc2506d49e..5e186c135921 100644
--- a/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
+++ b/drivers/gpu/drm/amd/display/dc/bios/command_table2.c
@@ -113,7 +113,7 @@ static void encoder_control_dmcub(
struct dc_dmub_srv *dmcub,
struct dig_encoder_stream_setup_parameters_v1_5 *dig)
{
- struct dmub_rb_cmd_digx_encoder_control encoder_control = { 0 };
+ struct dmub_rb_cmd_digx_encoder_control encoder_control = { };
encoder_control.header.type = DMUB_CMD__VBIOS;
encoder_control.header.sub_type = DMUB_CMD__VBIOS_DIGX_ENCODER_CONTROL;
@@ -339,7 +339,7 @@ static void set_pixel_clock_dmcub(
struct dc_dmub_srv *dmcub,
struct set_pixel_clock_parameter_v1_7 *clk)
{
- struct dmub_rb_cmd_set_pixel_clock pixel_clock = { 0 };
+ struct dmub_rb_cmd_set_pixel_clock pixel_clock = { };
pixel_clock.header.type = DMUB_CMD__VBIOS;
pixel_clock.header.sub_type = DMUB_CMD__VBIOS_SET_PIXEL_CLOCK;
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
index 24c5765890fa..ee3ef5094fd1 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c
@@ -698,7 +698,7 @@ void rn_clk_mgr_construct(
struct dccg *dccg)
{
struct dc_debug_options *debug = &ctx->dc->debug;
- struct dpm_clocks clock_table = { 0 };
+ struct dpm_clocks clock_table = { };
clk_mgr->base.ctx = ctx;
clk_mgr->base.funcs = &dcn21_funcs;
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 9ef9e50a34fa..7cbfe740a947 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -2683,9 +2683,9 @@ static void dp_test_send_link_test_pattern(struct dc_link *link)
static void dp_test_get_audio_test_data(struct dc_link *link, bool disable_video)
{
- union audio_test_mode dpcd_test_mode = {0};
- struct audio_test_pattern_type dpcd_pattern_type = {0};
- union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COUNT] = {0};
+ union audio_test_mode dpcd_test_mode = { };
+ struct audio_test_pattern_type dpcd_pattern_type = { };
+ union audio_test_pattern_period dpcd_pattern_period[AUDIO_CHANNELS_COUNT] = { };
enum dp_test_pattern test_pattern = DP_TEST_PATTERN_AUDIO_OPERATOR_DEFINED;
struct pipe_ctx *pipes = link->dc->current_state->res_ctx.pipe_ctx;
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
index 84d7ac5dd206..dfa541f0b0d3 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c
@@ -1253,9 +1253,9 @@ void hubp2_validate_dml_output(struct hubp *hubp,
struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr)
{
struct dcn20_hubp *hubp2 = TO_DCN20_HUBP(hubp);
- struct _vcs_dpi_display_rq_regs_st rq_regs = {0};
- struct _vcs_dpi_display_dlg_regs_st dlg_attr = {0};
- struct _vcs_dpi_display_ttu_regs_st ttu_attr = {0};
+ struct _vcs_dpi_display_rq_regs_st rq_regs = { };
+ struct _vcs_dpi_display_dlg_regs_st dlg_attr = { };
+ struct _vcs_dpi_display_ttu_regs_st ttu_attr = { };
DC_LOGGER_INIT(ctx->logger);
DC_LOG_DEBUG("DML Validation | Running Validation");
diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
index 63044ae06327..509b07c24758 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
@@ -449,7 +449,7 @@ struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv14_soc = {
.use_urgent_burst_bw = 0
};
-struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc = { 0 };
+struct _vcs_dpi_soc_bounding_box_st dcn2_0_nv12_soc = { };
#ifndef mmDP0_DP_DPHY_INTERNAL_CTRL
#define mmDP0_DP_DPHY_INTERNAL_CTRL 0x210f
diff --git a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
index d285ba622d61..654ea81b8ad6 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_hubp.c
@@ -365,9 +365,9 @@ void hubp21_validate_dml_output(struct hubp *hubp,
struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr)
{
struct dcn21_hubp *hubp21 = TO_DCN21_HUBP(hubp);
- struct _vcs_dpi_display_rq_regs_st rq_regs = {0};
- struct _vcs_dpi_display_dlg_regs_st dlg_attr = {0};
- struct _vcs_dpi_display_ttu_regs_st ttu_attr = {0};
+ struct _vcs_dpi_display_rq_regs_st rq_regs = { };
+ struct _vcs_dpi_display_dlg_regs_st dlg_attr = { };
+ struct _vcs_dpi_display_ttu_regs_st ttu_attr = { };
DC_LOGGER_INIT(ctx->logger);
DC_LOG_DEBUG("DML Validation | Running Validation");
@@ -778,7 +778,7 @@ void dmcub_PLAT_54186_wa(struct hubp *hubp, struct surface_flip_registers *flip_
{
struct dc_dmub_srv *dmcub = hubp->ctx->dmub_srv;
struct dcn21_hubp *hubp21 = TO_DCN21_HUBP(hubp);
- struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa = { 0 };
+ struct dmub_rb_cmd_PLAT_54186_wa PLAT_54186_wa = { };
PLAT_54186_wa.header.type = DMUB_CMD__PLAT_54186_WA;
PLAT_54186_wa.flip.DCSURF_PRIMARY_SURFACE_ADDRESS = flip_regs->DCSURF_PRIMARY_SURFACE_ADDRESS;
--
2.26.0
More information about the dri-devel
mailing list