[PATCH v11 00/10] Introduce memory interconnect for NVIDIA Tegra SoCs

Dmitry Osipenko digetx at gmail.com
Mon Dec 7 22:11:18 UTC 2020


05.12.2020 17:09, Krzysztof Kozlowski пишет:
> On Thu, 3 Dec 2020 22:24:29 +0300, Dmitry Osipenko wrote:
>> This series brings initial support for memory interconnect to Tegra20,
>> Tegra30 and Tegra124 SoCs.
>>
>> For the starter only display controllers and devfreq devices are getting
>> interconnect API support, others could be supported later on. The display
>> controllers have the biggest demand for interconnect API right now because
>> dynamic memory frequency scaling can't be done safely without taking into
>> account bandwidth requirement from the displays. In particular this series
>> fixes distorted display output on T30 Ouya and T124 TK1 devices.
>>
>> [...]
> 
> Applied, thanks!
> 
> [01/10] dt-bindings: memory: tegra20: emc: Document opp-supported-hw property
> [02/10] memory: tegra20: Support hardware versioning and clean up OPP table initialization
> [03/10] memory: tegra30: Support interconnect framework
>         commit: 01a51facb74fb337ff9fe734caa85dd6e246ef48
> 
> Best regards,
> 

Awesome, thanks! Good to have the warning splat silenced.


More information about the dri-devel mailing list