[PATCH] drm: drivers may provide multiple primary planes per CRTC

[Pekka Paalanen]

On Wed, 9 Dec 2020 01:36:37 +0100
Daniel Vetter <daniel at ffwll.ch> wrote:

> On Mon, Dec 07, 2020 at 09:10:00AM +0000, Simon Ser wrote:
> > On Monday, December 7th, 2020 at 9:45 AM, Pekka Paalanen <ppaalanen at gmail.com> wrote:
> >   
> > > > > > > > - * Cursor and overlay planes are optional. All drivers should provide one
> > > > > > > > - * primary plane per CRTC to avoid surprising userspace too much. See enum
> > > > > > > > + * Cursor and overlay planes are optional. All drivers should provide at least
> > > > > > > > + * one primary plane per CRTC to avoid surprising userspace too much. See enum  
> > > > > > >
> > > > > > > I think that's even more confusing, since this reads like there could be
> > > > > > > multiple primary planes for a specific CRTC. That's not the case, there'
> > > > > > > only one pointer going from drm_crtc->primary to a drm_plane in the
> > > > > > > kernel.  

So this comment from Daniel is actually wrong, because possible_crtcs
mask for a primary plane can have more than one bit set, and Simon's
wording is accurate.

Except "should" should be "must", see below.

> > > > > >
> > > > > > There could be multiple primary planes *usable* for a specific CRTC but
> > > > > > just one used at a time, right?  
> > > > >
> > > > > I'm not sure what you mean here, the crtc->primary link is invariant over
> > > > > the lifetime of a driver load. You can't pick a different one, that's set
> > > > > at driver init before drm_dev_register (and hence before userspace ever
> > > > > sees anything).  
> > > >
> > > > OK. I'm personally not very interested in documenting legacy bits, so I'll skip
> > > > that. I'm mainly interested here in making it clear possible_crtcs for a
> > > > primary plane can have more than one bit set. Because of the paragraph in the
> > > > current docs, some user-space developers have understood "more than one bit set
> > > > in possible_crtcs for a primary plane is a kernel bug".
> > > >
> > > > I'll send a v2 that makes it clear these pointers are for legacy uAPI.  
> > >
> > > Right, so this and what danvet said seem to be in direct conflict in
> > > atomic uAPI, repeating above:
> > >  
> > > > > I'm not sure what you mean here, the crtc->primary link is invariant over
> > > > > the lifetime of a driver load. You can't pick a different one, that's set
> > > > > at driver init before drm_dev_register (and hence before userspace ever
> > > > > sees anything).  
> > >
> > > But still, it is considered not a kernel bug that a primary plane has
> > > more than one bit set in its possible_crtcs.
> > >
> > > If a primary plane has more than one bit set in possible_crtcs, and it
> > > is not a kernel bug, then userspace expects to be able to choose any
> > > of the multiple indicated possible CRTCs for this primary plane.
> > >
> > > Which way is it?
> > >
> > > Or, is there a different limitation that for each CRTC, there must be
> > > exactly one primary plane with that CRTCs bit set in its possible_crtcs?
> > >
> > > IOW, you can have more CRTCs than primary planes in total, and you can
> > > activate each CRTC alone, but you cannot activate all CRTCs
> > > simultaneously because there are not enough primary planes for them?
> > >
> > > Representing it mathematically, the possible assignments according to
> > > possible_crtcs while ignoring all other limitations are:
> > > N CRTCs <-> M primary planes
> > >
> > > - Is N one or greater than one?
> > > - Is M one or greater than one?  
> > 
> > I think the current situation is that:
> > 
> > - It's perfectly fine for a driver to expose multiple bits in possible_crtcs.
> >   User-space can attach the primary plane to any of these CRTCs (of course, a
> >   primary plane still can only be attached to a single CRTC at a time). Drivers
> >   should provide as many primary planes as there are CRTCs.
> > - The legacy API doesn't expose primary planes. Some legacy IOCTLs like
> >   drmModeSetCrtc allow user-space to attach a FB directly to a CRTC. The driver
> >   needs to implicitly select a primary plane for this operation. That's the
> >   only case where the internal CRTC → primary plane link is used in the kernel.
> > 
> > Is this correct, Daniel?  
> 
> Yup. atomic doesn't use crtc->primary link at all.
> 
> Pekka, where did you see an indication that this crtc->primary link is
> used for atomic?

Hi Daniel,

I was asking about KMS in general, atomic included, and you were
talking about that variable, so I got really confused. I do not care
about kernel internals, only uAPI.

> My statement was only about legacy ioctl impact of
> ->primary. Atomic userspace can pick any plane it wants and consider that  
> the "primary" one (the hw/driver might reject that, but that's a different
> issue).

Even from non-primary planes?

Ok.

But to keep things simpler in userspace, userspace will probably settle
to always use exactly one primary type KMS plane for any CRTC it is
using.

> > So I believe M > 1 and N > 1 is possible and isn't a kernel bug. For instance
> > some drivers hardcode possible_crtcs to 0xFF (although it might be nicer to
> > user-space to set the bitmask depending on the number of CRTCs, to avoid
> > setting bits for non-existing CRTCs).  
> 
> possible_crtcs for a primary plane has exactly the same constraints as
> possible_crtcs for any other plane. The only additional constraint there
> is that:
> - first primary plane you iterate must have the first bit set in
>   possible_crtcs, and it is the primary plane for that crtc
> - 2nd primary plane has the 2nd bit set in possible_crtcs, and it is the
>   primary plane for that crtc
> 
> and so on. That's all. I'm not sure all drivers get this right, so I think
> it'd be good to check that at drm_dev_register time (we check a few other
> things about these possible_crtcs masks already, so it's a good fit).

That seems to create a 1:1 relationship between CRTCs and primary
planes, but additionally allowing other associations as well.

This means that there cannot be two primary planes that are *only*
possible with the same CRTC.

Also, there cannot be two CRTCs that could *only* be possible with the
same primary plane.

In other words, enabling a CRTC never fails because you run out of
primary planes, assuming you use one plane in total for each CRTC.

I understand that the answer to my question "There could be multiple
primary planes *usable* for a specific CRTC but just one used at a
time, right?" is largely "Yes." because possible_crtcs mask for any
plane can have more than one bit set. Whether it is actually possible
to use two KMS planes of type primary simultaneously on the same CRTC
is up to a driver, I guess, but not forbidden, yet unlikely to work.


Thanks,
pq
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