[PATCH v3 1/5] dt-bindings: display: add panel-timing.yaml
Sam Ravnborg
sam at ravnborg.org
Sun Feb 16 18:15:09 UTC 2020
Add meta-schema variant of panel-timing and
reference it from panel-common.yaml.
Part of this came form other files with other
licenses - original commits:
cc3f414cf2e4 ("video: add of helper for display timings/videomode")
86f46565dff3 ("dt-bindings: display: display-timing: Add property to configure sync drive edge")
9cad9c95d7e8 ("Documentation: DocBook DRM framework documentation")
The original authors acked the license change to:
(GPL-2.0-only OR BSD-2-Clause)
v2:
- Got OK from original authors for re-license
Huge thanks for the quick replies!
- Typo fixes (Oleksandr)
- Drop -array variant when not needed (Maxime)
- Replace oneOf:... with enum (Maxime)
- Drop type from clock-frequency (Rob)
- Drop "|" when not needed (Rob)
v3:
- Added comment to acks that are only for the license change
- Add yaml document terminator "..."
- Updated description (removed reference to native-mode)
Signed-off-by: Sam Ravnborg <sam at ravnborg.org>
Acked-by: Laurent Pinchart <laurent.pinchart at ideasonboard.com> [license change]
Acked-by: Peter Ujfalusi <peter.ujfalusi at ti.com> [license change]
Acked-by: Steffen Trumtrar <s.trumtrar at pengutronix.de> [license change]
Acked-by: Philipp Zabel <p.zabel at pengutronix.de> [license change]
Reviewed-by: Rob Herring <robh at kernel.org>
Cc: Thierry Reding <thierry.reding at gmail.com>
Cc: Oleksandr Suvorov <oleksandr.suvorov at toradex.com>
Cc: Maxime Ripard <mripard at kernel.org>
Cc: devicetree at vger.kernel.org
---
.../bindings/display/panel/panel-common.yaml | 7 +-
.../bindings/display/panel/panel-timing.yaml | 227 ++++++++++++++++++
2 files changed, 230 insertions(+), 4 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/panel/panel-timing.yaml
diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.yaml b/Documentation/devicetree/bindings/display/panel/panel-common.yaml
index ef8d8cdfcede..8070c439adbd 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-common.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-common.yaml
@@ -54,13 +54,12 @@ properties:
# Display Timings
panel-timing:
- type: object
description:
Most display panels are restricted to a single resolution and
require specific display timings. The panel-timing subnode expresses those
- timings as specified in the timing subnode section of the display timing
- bindings defined in
- Documentation/devicetree/bindings/display/panel/display-timing.txt.
+ timings.
+ allOf:
+ - $ref: panel-timing.yaml#
# Connectivity
port:
diff --git a/Documentation/devicetree/bindings/display/panel/panel-timing.yaml b/Documentation/devicetree/bindings/display/panel/panel-timing.yaml
new file mode 100644
index 000000000000..bd558ad7891f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/panel-timing.yaml
@@ -0,0 +1,227 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/panel/panel-timing.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: panel timing bindings
+
+maintainers:
+ - Thierry Reding <thierry.reding at gmail.com>
+ - Sam Ravnborg <sam at ravnborg.org>
+
+description: |
+ There are different ways of describing the timing data of a panel. The
+ devicetree representation corresponds to the one commonly found in datasheets
+ for panels.
+
+ The parameters are defined as seen in the following illustration.
+
+ +----------+-------------------------------------+----------+-------+
+ | | ^ | | |
+ | | |vback_porch | | |
+ | | v | | |
+ +----------#######################################----------+-------+
+ | # ^ # | |
+ | # | # | |
+ | hback # | # hfront | hsync |
+ | porch # | hactive # porch | len |
+ |<-------->#<-------+--------------------------->#<-------->|<----->|
+ | # | # | |
+ | # |vactive # | |
+ | # | # | |
+ | # v # | |
+ +----------#######################################----------+-------+
+ | | ^ | | |
+ | | |vfront_porch | | |
+ | | v | | |
+ +----------+-------------------------------------+----------+-------+
+ | | ^ | | |
+ | | |vsync_len | | |
+ | | v | | |
+ +----------+-------------------------------------+----------+-------+
+
+
+ The following is the panel timings shown with time on the x-axis.
+ This matches the timing diagrams often found in data sheets.
+
+ Active Front Sync Back
+ Region Porch Porch
+ <-----------------------><----------------><-------------><-------------->
+ //////////////////////|
+ ////////////////////// |
+ ////////////////////// |.................. ................
+ _______________
+
+ Timing can be specified either as a typical value or as a tuple
+ of min, typ, max values.
+
+properties:
+
+ clock-frequency:
+ description: Panel clock in Hz
+
+ hactive:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Horizontal panel resolution in pixels
+
+ vactive:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Vertical panel resolution in pixels
+
+ hfront-porch:
+ description: Horizontal front porch panel timing
+ oneOf:
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - maxItems: 1
+ items:
+ description: typical number of pixels
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+ - minItems: 3
+ maxItems: 3
+ items:
+ description: min, typ, max number of pixels
+
+ hback-porch:
+ description: Horizontal back porch timing
+ oneOf:
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - maxItems: 1
+ items:
+ description: typical number of pixels
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+ - minItems: 3
+ maxItems: 3
+ items:
+ description: min, typ, max number of pixels
+
+ hsync-len:
+ description: Horizontal sync length panel timing
+ oneOf:
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - maxItems: 1
+ items:
+ description: typical number of pixels
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+ - minItems: 3
+ maxItems: 3
+ items:
+ description: min, typ, max number of pixels
+
+ vfront-porch:
+ description: Vertical front porch panel timing
+ oneOf:
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - maxItems: 1
+ items:
+ description: typical number of lines
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+ - minItems: 3
+ maxItems: 3
+ items:
+ description: min, typ, max number of lines
+
+ vback-porch:
+ description: Vertical back porch panel timing
+ oneOf:
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - maxItems: 1
+ items:
+ description: typical number of lines
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+ - minItems: 3
+ maxItems: 3
+ items:
+ description: min, typ, max number of lines
+
+ vsync-len:
+ description: Vertical sync length panel timing
+ oneOf:
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - maxItems: 1
+ items:
+ description: typical number of lines
+ - allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-array
+ - minItems: 3
+ maxItems: 3
+ items:
+ description: min, typ, max number of lines
+
+ hsync-active:
+ description: |
+ Horizontal sync pulse.
+ 0 selects active low, 1 selects active high.
+ If omitted then it is not used by the hardware
+ enum: [0, 1]
+
+ vsync-active:
+ description: |
+ Vertical sync pulse.
+ 0 selects active low, 1 selects active high.
+ If omitted then it is not used by the hardware
+ enum: [0, 1]
+
+ de-active:
+ description: |
+ Data enable.
+ 0 selects active low, 1 selects active high.
+ If omitted then it is not used by the hardware
+ enum: [0, 1]
+
+ pixelclk-active:
+ description: |
+ Data driving on rising or falling edge.
+ Use 0 to drive pixel data on falling edge and
+ sample data on rising edge.
+ Use 1 to drive pixel data on rising edge and
+ sample data on falling edge
+ enum: [0, 1]
+
+ syncclk-active:
+ description: |
+ Drive sync on rising or sample sync on falling edge.
+ If not specified then the setup is as specified by pixelclk-active.
+ Use 0 to drive sync on falling edge and
+ sample sync on rising edge of pixel clock.
+ Use 1 to drive sync on rising edge and
+ sample sync on falling edge of pixel clock
+ enum: [0, 1]
+
+ interlaced:
+ type: boolean
+ description: Enable interlaced mode
+
+ doublescan:
+ type: boolean
+ description: Enable double scan mode
+
+ doubleclk:
+ type: boolean
+ description: Enable double clock mode
+
+required:
+ - clock-frequency
+ - hactive
+ - vactive
+ - hfront-porch
+ - hback-porch
+ - hsync-len
+ - vfront-porch
+ - vback-porch
+ - vsync-len
+
+additionalProperties: false
+
+...
--
2.20.1
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