[PATCH v3] phy: Add DisplayPort configuration options
Jyri Sarha
jsarha at ti.com
Tue Jan 7 18:52:46 UTC 2020
On 06/01/2020 14:22, Yuti Amonkar wrote:
> Allow DisplayPort PHYs to be configured through the generic
> functions through a custom structure added to the generic union.
> The configuration structure is used for reconfiguration of
> DisplayPort PHYs during link training operation.
>
> The parameters added here are the ones defined in the DisplayPort
> spec v1.4 which include link rate, number of lanes, voltage swing
> and pre-emphasis.
>
> Add the DisplayPort phy mode to the generic phy_mode enum.
>
> Signed-off-by: Yuti Amonkar <yamonkar at cadence.com>
Reviewed-by: Jyri Sarha <jsarha at ti.com>
Kishon, can you still pick this for v5.6?
Best regards,
Jyri
> ---
>
> Version History:
> v3:
> Add DisplayPort mode to the generic phy_mode enum.
>
> v2:
> Update DisplayPort spec version in the commit message.
>
> This patch was a part of [1] series earlier but we think that it needs
> to have a separate attention of the reviewers. Also as both [1] & [2] are
> dependent on this patch, our sincere request to reviewers to have a
> faster review of this patch.
>
> [1]
>
> https://lkml.org/lkml/2019/12/23/392
>
> [2]
>
> https://lkml.org/lkml/2019/12/23/394
>
> include/linux/phy/phy-dp.h | 95 ++++++++++++++++++++++++++++++++++++++++++++++
> include/linux/phy/phy.h | 7 +++-
> 2 files changed, 101 insertions(+), 1 deletion(-)
> create mode 100644 include/linux/phy/phy-dp.h
>
> diff --git a/include/linux/phy/phy-dp.h b/include/linux/phy/phy-dp.h
> new file mode 100644
> index 0000000..18cad23
> --- /dev/null
> +++ b/include/linux/phy/phy-dp.h
> @@ -0,0 +1,95 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * Copyright (C) 2019 Cadence Design Systems Inc.
> + */
> +
> +#ifndef __PHY_DP_H_
> +#define __PHY_DP_H_
> +
> +#include <linux/types.h>
> +
> +/**
> + * struct phy_configure_opts_dp - DisplayPort PHY configuration set
> + *
> + * This structure is used to represent the configuration state of a
> + * DisplayPort phy.
> + */
> +struct phy_configure_opts_dp {
> + /**
> + * @link_rate:
> + *
> + * Link Rate, in Mb/s, of the main link.
> + *
> + * Allowed values: 1620, 2160, 2430, 2700, 3240, 4320, 5400, 8100 Mb/s
> + */
> + unsigned int link_rate;
> +
> + /**
> + * @lanes:
> + *
> + * Number of active, consecutive, data lanes, starting from
> + * lane 0, used for the transmissions on main link.
> + *
> + * Allowed values: 1, 2, 4
> + */
> + unsigned int lanes;
> +
> + /**
> + * @voltage:
> + *
> + * Voltage swing levels, as specified by DisplayPort specification,
> + * to be used by particular lanes. One value per lane.
> + * voltage[0] is for lane 0, voltage[1] is for lane 1, etc.
> + *
> + * Maximum value: 3
> + */
> + unsigned int voltage[4];
> +
> + /**
> + * @pre:
> + *
> + * Pre-emphasis levels, as specified by DisplayPort specification, to be
> + * used by particular lanes. One value per lane.
> + *
> + * Maximum value: 3
> + */
> + unsigned int pre[4];
> +
> + /**
> + * @ssc:
> + *
> + * Flag indicating, whether or not to enable spread-spectrum clocking.
> + *
> + */
> + u8 ssc : 1;
> +
> + /**
> + * @set_rate:
> + *
> + * Flag indicating, whether or not reconfigure link rate and SSC to
> + * requested values.
> + *
> + */
> + u8 set_rate : 1;
> +
> + /**
> + * @set_lanes:
> + *
> + * Flag indicating, whether or not reconfigure lane count to
> + * requested value.
> + *
> + */
> + u8 set_lanes : 1;
> +
> + /**
> + * @set_voltages:
> + *
> + * Flag indicating, whether or not reconfigure voltage swing
> + * and pre-emphasis to requested values. Only lanes specified
> + * by "lanes" parameter will be affected.
> + *
> + */
> + u8 set_voltages : 1;
> +};
> +
> +#endif /* __PHY_DP_H_ */
> diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h
> index 15032f14..962a469 100644
> --- a/include/linux/phy/phy.h
> +++ b/include/linux/phy/phy.h
> @@ -16,6 +16,7 @@
> #include <linux/pm_runtime.h>
> #include <linux/regulator/consumer.h>
>
> +#include <linux/phy/phy-dp.h>
> #include <linux/phy/phy-mipi-dphy.h>
>
> struct phy;
> @@ -38,7 +39,8 @@ enum phy_mode {
> PHY_MODE_PCIE,
> PHY_MODE_ETHERNET,
> PHY_MODE_MIPI_DPHY,
> - PHY_MODE_SATA
> + PHY_MODE_SATA,
> + PHY_MODE_DP
> };
>
> /**
> @@ -46,9 +48,12 @@ enum phy_mode {
> *
> * @mipi_dphy: Configuration set applicable for phys supporting
> * the MIPI_DPHY phy mode.
> + * @dp: Configuration set applicable for phys supporting
> + * the DisplayPort protocol.
> */
> union phy_configure_opts {
> struct phy_configure_opts_mipi_dphy mipi_dphy;
> + struct phy_configure_opts_dp dp;
> };
>
> /**
>
--
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