[Intel-gfx] [PATCH libdrm v2] intel: drm_intel_bo_gem_create_from_* on platforms w/o HW tiling
Imre Deak
imre.deak at intel.com
Tue Jan 28 13:38:28 UTC 2020
On Wed, Jan 22, 2020 at 11:31:22AM +0200, Imre Deak wrote:
> Platforms without a HW detiler doesn't support the get_tiling IOCTL.
> Fix the drm_intel_bo_gem_create_from_* functions assuming the default
> no-tiling, no-swizzling setting for the GEM buffer in this case.
>
> v2:
> - Add the missing gem handle IOCTL parameter. (Eric)
>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> Reviewed-by: Emil Velikov <emil.velikov at collabora.com>
> Reviewed-by: Eric Engestrom <eric at engestrom.ch>
Thanks for the reviewes, pushed to
gitlab.freedesktop.org:mesa/drm.git master
> ---
> intel/intel_bufmgr_gem.c | 43 +++++++++++++++++++++++++---------------
> 1 file changed, 27 insertions(+), 16 deletions(-)
>
> diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
> index fbf48730..ade13a4c 100644
> --- a/intel/intel_bufmgr_gem.c
> +++ b/intel/intel_bufmgr_gem.c
> @@ -1069,6 +1069,28 @@ check_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
> tiling_mode, stride, size, flags);
> }
>
> +static int get_tiling_mode(drm_intel_bufmgr_gem *bufmgr_gem,
> + uint32_t gem_handle,
> + uint32_t *tiling_mode,
> + uint32_t *swizzle_mode)
> +{
> + struct drm_i915_gem_get_tiling get_tiling = {
> + .handle = gem_handle,
> + };
> + int ret;
> +
> + ret = drmIoctl(bufmgr_gem->fd,
> + DRM_IOCTL_I915_GEM_GET_TILING,
> + &get_tiling);
> + if (ret != 0 && errno != EOPNOTSUPP)
> + return ret;
> +
> + *tiling_mode = get_tiling.tiling_mode;
> + *swizzle_mode = get_tiling.swizzle_mode;
> +
> + return 0;
> +}
> +
> /**
> * Returns a drm_intel_bo wrapping the given buffer object handle.
> *
> @@ -1084,7 +1106,6 @@ drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
> drm_intel_bo_gem *bo_gem;
> int ret;
> struct drm_gem_open open_arg;
> - struct drm_i915_gem_get_tiling get_tiling;
>
> /* At the moment most applications only have a few named bo.
> * For instance, in a DRI client only the render buffers passed
> @@ -1146,16 +1167,11 @@ drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
> HASH_ADD(name_hh, bufmgr_gem->name_table,
> global_name, sizeof(bo_gem->global_name), bo_gem);
>
> - memclear(get_tiling);
> - get_tiling.handle = bo_gem->gem_handle;
> - ret = drmIoctl(bufmgr_gem->fd,
> - DRM_IOCTL_I915_GEM_GET_TILING,
> - &get_tiling);
> + ret = get_tiling_mode(bufmgr_gem, bo_gem->gem_handle,
> + &bo_gem->tiling_mode, &bo_gem->swizzle_mode);
> if (ret != 0)
> goto err_unref;
>
> - bo_gem->tiling_mode = get_tiling.tiling_mode;
> - bo_gem->swizzle_mode = get_tiling.swizzle_mode;
> /* XXX stride is unknown */
> drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, 0);
> DBG("bo_create_from_handle: %d (%s)\n", handle, bo_gem->name);
> @@ -2634,7 +2650,6 @@ drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, int prime_fd, int s
> int ret;
> uint32_t handle;
> drm_intel_bo_gem *bo_gem;
> - struct drm_i915_gem_get_tiling get_tiling;
>
> pthread_mutex_lock(&bufmgr_gem->lock);
> ret = drmPrimeFDToHandle(bufmgr_gem->fd, prime_fd, &handle);
> @@ -2688,15 +2703,11 @@ drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr, int prime_fd, int s
> bo_gem->has_error = false;
> bo_gem->reusable = false;
>
> - memclear(get_tiling);
> - get_tiling.handle = bo_gem->gem_handle;
> - if (drmIoctl(bufmgr_gem->fd,
> - DRM_IOCTL_I915_GEM_GET_TILING,
> - &get_tiling))
> + ret = get_tiling_mode(bufmgr_gem, handle,
> + &bo_gem->tiling_mode, &bo_gem->swizzle_mode);
> + if (ret)
> goto err;
>
> - bo_gem->tiling_mode = get_tiling.tiling_mode;
> - bo_gem->swizzle_mode = get_tiling.swizzle_mode;
> /* XXX stride is unknown */
> drm_intel_bo_gem_set_in_aperture_size(bufmgr_gem, bo_gem, 0);
>
> --
> 2.23.1
>
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