[radeon-alex:amd-staging-drm-next 1133/1153] drivers/gpu/drm/amd/amdgpu/navi10_ih.c:64:2: warning: ISO C90 forbids mixed declarations and code

kernel test robot lkp at intel.com
Tue Jul 21 20:33:02 UTC 2020


tree:   git://people.freedesktop.org/~agd5f/linux.git amd-staging-drm-next
head:   7173949df4548299ee6c63736f76247d3f288cd4
commit: f6668a70defec83ec0c837e052dd5490b66068d3 [1133/1153] drm/amdgpu: add timeout flush mechanism to update wptr for self interrupt
config: alpha-allmodconfig (attached as .config)
compiler: alpha-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git checkout f6668a70defec83ec0c837e052dd5490b66068d3
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=alpha 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/amd/amdgpu/navi10_ih.c: In function 'force_update_wptr_for_self_int':
>> drivers/gpu/drm/amd/amdgpu/navi10_ih.c:64:2: warning: ISO C90 forbids mixed declarations and code [-Wdeclaration-after-statement]
      64 |  u32 ih_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_CNTL2);
         |  ^~~
   In file included from drivers/gpu/drm/amd/amdgpu/navi10_ih.c:26:
   At top level:
   drivers/gpu/drm/amd/amdgpu/amdgpu.h:192:19: warning: 'debug_evictions' defined but not used [-Wunused-const-variable=]
     192 | static const bool debug_evictions; /* = false */
         |                   ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu.h:191:18: warning: 'sched_policy' defined but not used [-Wunused-const-variable=]
     191 | static const int sched_policy = KFD_SCHED_POLICY_HWS;
         |                  ^~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/amdgpu/../display/dc/dm_services_types.h:30,
                    from drivers/gpu/drm/amd/amdgpu/../include/dm_pp_interface.h:26,
                    from drivers/gpu/drm/amd/amdgpu/amdgpu.h:65,
                    from drivers/gpu/drm/amd/amdgpu/navi10_ih.c:26:
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
      67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
         |                                ^~~~~~~~~~~~~

vim +64 drivers/gpu/drm/amd/amdgpu/navi10_ih.c

    41	
    42	/**
    43	 * force_update_wptr_for_self_int - Force update the wptr for self interrupt
    44	 *
    45	 * @adev: amdgpu_device pointer
    46	 * @threshold: threshold to trigger the wptr reporting
    47	 * @timeout: timeout to trigger the wptr reporting
    48	 * @enabled: Enable/disable timeout flush mechanism
    49	 *
    50	 * threshold input range: 0 ~ 15, default 0,
    51	 * real_threshold = 2^threshold
    52	 * timeout input range: 0 ~ 20, default 8,
    53	 * real_timeout = (2^timeout) * 1024 / (socclk_freq)
    54	 *
    55	 * Force update wptr for self interrupt ( >= SIENNA_CICHLID).
    56	 */
    57	static void
    58	force_update_wptr_for_self_int(struct amdgpu_device *adev,
    59				       u32 threshold, u32 timeout, bool enabled)
    60	{
    61		if (adev->asic_type < CHIP_SIENNA_CICHLID)
    62			return;
    63	
  > 64		u32 ih_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_CNTL2);
    65		u32 ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1);
    66	
    67		ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2,
    68					SELF_IV_FORCE_WPTR_UPDATE_TIMEOUT, timeout);
    69		ih_cntl = REG_SET_FIELD(ih_cntl, IH_CNTL2,
    70					SELF_IV_FORCE_WPTR_UPDATE_ENABLE, enabled);
    71		ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING1,
    72					   RB_USED_INT_THRESHOLD, threshold);
    73	
    74		WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING1, ih_rb_cntl);
    75		ih_rb_cntl = RREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2);
    76		ih_rb_cntl = REG_SET_FIELD(ih_rb_cntl, IH_RB_CNTL_RING2,
    77					   RB_USED_INT_THRESHOLD, threshold);
    78		WREG32_SOC15(OSSSYS, 0, mmIH_RB_CNTL_RING2, ih_rb_cntl);
    79		WREG32_SOC15(OSSSYS, 0, mmIH_CNTL2, ih_cntl);
    80	}
    81	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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