[PATCH v6 0/6] drm/meson: add support for Amlogic Video FBC
Neil Armstrong
narmstrong at baylibre.com
Mon May 4 15:07:38 UTC 2020
Hi Daniel,
On 21/04/2020 18:15, Neil Armstrong wrote:
> Amlogic uses a proprietary lossless image compression protocol and format
> for their hardware video codec accelerators, either video decoders or
> video input encoders.
>
> It considerably reduces memory bandwidth while writing and reading
> frames in memory.
>
> The underlying storage is considered to be 3 components, 8bit or 10-bit
> per component, YCbCr 420, single plane :
> - DRM_FORMAT_YUV420_8BIT
> - DRM_FORMAT_YUV420_10BIT
>
> This modifier will be notably added to DMA-BUF frames imported from the V4L2
> Amlogic VDEC decoder.
>
> At least two layout are supported :
> - Basic: composed of a body and a header
> - Scatter: the buffer is filled with a IOMMU scatter table referring
> to the encoder current memory layout. This mode if more efficient in terms
> of memory allocation but frames are not dumpable and only valid during until
> the buffer is freed and back in control of the encoder
>
> At least two options are supported :
> - Memory saving: when the pixel bpp is 8b, the size of the superblock can
> be reduced, thus saving memory.
Is the fourcc DRM_FORMAT_MOD_ definition correct now ? It includes the changes I proposed on the
v5 thread.
Thanks,
Neil
>
> This serie adds the missing register, updated the FBC decoder registers
> content to be committed by the crtc code.
>
> The Amlogic FBC has been tested with compressed content from the Amlogic
> HW VP9 decoder on S905X (GXL), S905D2 (G12A) and S905X3 (SM1) in 8bit
> (Scatter+Mem Saving on G12A/SM1, Mem Saving on GXL) and 10bit
> (Scatter on G12A/SM1, default on GXL).
>
> It's expected to work as-is on GXM and G12B SoCs.
>
> Changes since v5 at [5]:
> - merged all fourcc patches in 1
> - fixed fourcc definition to have only a single DRM_MOD_
> - fixed 2 checkpatch issues
>
> Changes since v4 at [4]:
> - added layout and options mask
> - cosmetic changes in fourcc.h
> - fixed mod check using the masks
> - fixed plane apply using the masks
>
> Changes since v3 at [3]:
> - added dropped fourcc patch for scatter
> - fixed build of last patch
>
> Changes since v2 at [2]:
> - Added "BASIC" layout and moved the SCATTER mode as layout, making
> BASIC and SCATTER layout exclusives
> - Moved the Memory Saving at bit 8 for options fields
> - Split fourcc and overlay patch to introduce basic, mem saving and then
> scatter in separate patches
> - Added comment about "transferability" of the buffers
>
> Changes since v1 at [1]:
> - s/VD1_AXI_SEL_AFB/VD1_AXI_SEL_AFBC/ into meson_registers.h
>
> [1] https://patchwork.freedesktop.org/series/73722/#rev1
> [2] https://patchwork.freedesktop.org/series/73722/#rev2
> [3] https://patchwork.freedesktop.org/series/73722/#rev3
> [4] https://patchwork.freedesktop.org/series/73722/#rev4
> [4] https://patchwork.freedesktop.org/series/73722/#rev5
>
> Neil Armstrong (6):
> drm/fourcc: Add modifier definitions for describing Amlogic Video
> Framebuffer Compression
> drm/meson: add Amlogic Video FBC registers
> drm/meson: overlay: setup overlay for Amlogic FBC
> drm/meson: overlay: setup overlay for Amlogic FBC Memory Saving mode
> drm/meson: overlay: setup overlay for Amlogic FBC Scatter Memory
> layout
> drm/meson: crtc: handle commit of Amlogic FBC frames
>
> drivers/gpu/drm/meson/meson_crtc.c | 118 +++++++---
> drivers/gpu/drm/meson/meson_drv.h | 16 ++
> drivers/gpu/drm/meson/meson_overlay.c | 290 +++++++++++++++++++++++-
> drivers/gpu/drm/meson/meson_registers.h | 22 ++
> include/uapi/drm/drm_fourcc.h | 74 ++++++
> 5 files changed, 482 insertions(+), 38 deletions(-)
>
More information about the dri-devel
mailing list