[PATCH 5/4] dt-bindings: display: bridge: thc63lvd1024: Document dual-output mode
jacopo at jmondi.org
Thu May 14 07:18:35 UTC 2020
On Thu, May 14, 2020 at 02:21:27AM +0300, Laurent Pinchart wrote:
> The DT binding support both dual-input and dual-output mode, but only
> dual-input is documented. Document dual-output mode.
> Suggested-by: Jacopo Mondi <jacopo+renesas at jmondi.org>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas at ideasonboard.com>
Acked-by: Jacopo Mondi <jacopo at jmondi.org>
> .../display/bridge/thine,thc63lvd1024.yaml | 16 +++++++++++-----
> 1 file changed, 11 insertions(+), 5 deletions(-)
> diff --git a/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml
> index 469ac4a34273..fedd3460d6f6 100644
> --- a/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/thine,thc63lvd1024.yaml
> @@ -30,11 +30,17 @@ properties:
> This device has four video ports. Their connections are modeled using the
> OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
> - The device can operate in single-link mode or dual-link mode. In
> - single-link mode, all pixels are received on port at 0, and port at 1 shall not
> - contain any endpoint. In dual-link mode, even-numbered pixels are
> - received on port at 0 and odd-numbered pixels on port at 1, and both port at 0 and
> - port at 1 shall contain endpoints.
> + The device can operate in single or dual input and output modes.
> + When operating in single input mode, all pixels are received on port at 0,
> + and port at 1 shall not contain any endpoint. In dual input mode,
> + even-numbered pixels are received on port at 0 and odd-numbered pixels on
> + port at 1, and both port at 0 and port at 1 shall contain endpoints.
> + When operating in single output mode all pixels are output from the first
> + CMOS/TTL port and port at 3 shall not contain any endpoint. In dual output
> + mode pixels are output from both CMOS/TTL ports and both port at 2 and
> + port at 3 shall contain endpoints.
> Laurent Pinchart
More information about the dri-devel