[PATCH v5 07/13] soc: mediatek: cmdq: add write_s function
Matthias Brugger
matthias.bgg at gmail.com
Sun May 24 18:12:17 UTC 2020
On 24/05/2020 19:26, Dennis-YC Hsieh wrote:
> Hi Mattias,
>
> Thanks for your comment.
>
> On Sat, 2020-05-16 at 20:14 +0200, Matthias Brugger wrote:
>>
>> On 08/03/2020 11:52, Dennis YC Hsieh wrote:
>>> add write_s function in cmdq helper functions which
>>> writes value contains in internal register to address
>>> with large dma access support.
>>>
>>> Signed-off-by: Dennis YC Hsieh <dennis-yc.hsieh at mediatek.com>
>>> Reviewed-by: CK Hu <ck.hu at mediatek.com>
>>> ---
>>> drivers/soc/mediatek/mtk-cmdq-helper.c | 34 +++++++++++++++++++++++-
>>> include/linux/mailbox/mtk-cmdq-mailbox.h | 2 ++
>>> include/linux/soc/mediatek/mtk-cmdq.h | 20 ++++++++++++++
>>> 3 files changed, 55 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c
>>> index 33153d17c9d9..90f1ff2b4b00 100644
>>> --- a/drivers/soc/mediatek/mtk-cmdq-helper.c
>>> +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c
>>> @@ -18,6 +18,10 @@ struct cmdq_instruction {
>>> union {
>>> u32 value;
>>> u32 mask;
>>> + struct {
>>> + u16 arg_c;
>>> + u16 src_reg;
>>> + };
>>> };
>>> union {
>>> u16 offset;
>>> @@ -29,7 +33,7 @@ struct cmdq_instruction {
>>> struct {
>>> u8 sop:5;
>>> u8 arg_c_t:1;
>>> - u8 arg_b_t:1;
>>> + u8 src_t:1;
>>
>> fixing patch 6/13 please. seems the struct should be added in this patch.
>
> ok, will move to this patch.
>
>>
>>> u8 dst_t:1;
>>> };
>>> };
>>> @@ -222,6 +226,34 @@ int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
>>> }
>>> EXPORT_SYMBOL(cmdq_pkt_write_mask);
>>>
>>> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
>>> + u16 addr_low, u16 src_reg_idx, u32 mask)
>>> +{
>>> + struct cmdq_instruction inst = { {0} };
>>> + int err;
>>> +
>>> + if (mask != U32_MAX) {
>>> + inst.op = CMDQ_CODE_MASK;
>>> + inst.mask = ~mask;
>>> + err = cmdq_pkt_append_command(pkt, inst);
>>> + if (err < 0)
>>> + return err;
>>> +
>>> + inst.mask = 0;
>>> + inst.op = CMDQ_CODE_WRITE_S_MASK;
>>> + } else {
>>> + inst.op = CMDQ_CODE_WRITE_S;
>>> + }
>>> +
>>> + inst.src_t = CMDQ_REG_TYPE;
>>
>> Not defined.
>> Please make sure that every patch compiles on it's own and does not add a
>> regression. This is very helpful if we have to bisect the kernel in the future.
>
> May I know which part not defined? The src_t defined on top of this
> patch and CMDQ_REG_TYPE defined in last patc (see 06/13).
correct, sorry for the noise.
>
>>
>>> + inst.sop = high_addr_reg_idx;
>>> + inst.offset = addr_low;
>>> + inst.src_reg = src_reg_idx;
>>> +
>>> + return cmdq_pkt_append_command(pkt, inst);
>>> +}
>>> +EXPORT_SYMBOL(cmdq_pkt_write_s);
>>> +
>>> int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event)
>>> {
>>> struct cmdq_instruction inst = { {0} };
>>> diff --git a/include/linux/mailbox/mtk-cmdq-mailbox.h b/include/linux/mailbox/mtk-cmdq-mailbox.h
>>> index 121c3bb6d3de..8ef87e1bd03b 100644
>>> --- a/include/linux/mailbox/mtk-cmdq-mailbox.h
>>> +++ b/include/linux/mailbox/mtk-cmdq-mailbox.h
>>> @@ -59,6 +59,8 @@ enum cmdq_code {
>>> CMDQ_CODE_JUMP = 0x10,
>>> CMDQ_CODE_WFE = 0x20,
>>> CMDQ_CODE_EOC = 0x40,
>>> + CMDQ_CODE_WRITE_S = 0x90,
>>> + CMDQ_CODE_WRITE_S_MASK = 0x91,
>>> CMDQ_CODE_LOGIC = 0xa0,
>>> };
>>>
>>> diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h
>>> index 83340211e1d3..c72d826d8934 100644
>>> --- a/include/linux/soc/mediatek/mtk-cmdq.h
>>> +++ b/include/linux/soc/mediatek/mtk-cmdq.h
>>> @@ -12,6 +12,8 @@
>>> #include <linux/timer.h>
>>>
>>> #define CMDQ_NO_TIMEOUT 0xffffffffu
>>> +#define CMDQ_ADDR_HIGH(addr) ((u32)(((addr) >> 16) & GENMASK(31, 0)))
>>> +#define CMDQ_ADDR_LOW(addr) ((u16)(addr) | BIT(1))
>>>
>>> struct cmdq_pkt;
>>>
>>> @@ -102,6 +104,24 @@ int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value);
>>> int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys,
>>> u16 offset, u32 value, u32 mask);
>>>
>>> +/**
>>> + * cmdq_pkt_write_s() - append write_s command to the CMDQ packet
>>> + * @pkt: the CMDQ packet
>>> + * @high_addr_reg_idx: internal regisger ID which contains high address of pa
>>
>> s/regisger/register
>
> will fix
>
>>
>>> + * @addr_low: low address of pa
>>> + * @src_reg_idx: the CMDQ internal register ID which cache source value
>>> + * @mask: the specified target address mask, use U32_MAX if no need
>>> + *
>>> + * Return: 0 for success; else the error code is returned
>>> + *
>>> + * Support write value to physical address without subsys. Use CMDQ_ADDR_HIGH()
>>> + * to get high addrees and call cmdq_pkt_assign() to assign value into internal
>>
>> s/addrees/address
>
> will fix
>
>>
>>> + * reg. Also use CMDQ_ADDR_LOW() to get low address for addr_low parameterwhen
>>
>> s/parameterwhen/parameter when
>
> will fix
>
>>
>>> + * call to this function.
>>> + */
>>> +int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx,
>>> + u16 addr_low, u16 src_reg_idx, u32 mask);
>>> +
>>
>> In general I wonder if we shouldn't provide two functions, one that writes a
>> mask and on for the else case.
>
> ok, I'll separate this function to cmdq_pkt_write_s and
> cmdq_pkt_write_s_mask. Let the client choose which case is more
> suitable.
Sound good, thanks.
>
>
>>
>> Regards,
>> Matthias
>>
>>> /**
>>> * cmdq_pkt_wfe() - append wait for event command to the CMDQ packet
>>> * @pkt: the CMDQ packet
>>>
>
More information about the dri-devel
mailing list