[radeon-alex:amd-20.45 630/2417] drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_chardev.c:2633:11: warning: variable 'gpu_id' set but not used

kernel test robot lkp at intel.com
Sat Nov 21 01:26:05 UTC 2020


tree:   git://people.freedesktop.org/~agd5f/linux.git amd-20.45
head:   1807abbb3a7f17fc931a15d7fd4365ea148c6bb1
commit: 4978452e875a60112754d1247480cd76321e3ff9 [630/2417] drm/amdkcl: generate config.h
config: powerpc-allyesconfig (attached as .config)
compiler: powerpc64-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        git remote add radeon-alex git://people.freedesktop.org/~agd5f/linux.git
        git fetch --no-tags radeon-alex amd-20.45
        git checkout 4978452e875a60112754d1247480cd76321e3ff9
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=powerpc 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_chardev.c: In function 'kfd_ioctl_dbg_set_debug_trap':
>> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_chardev.c:2633:11: warning: variable 'gpu_id' set but not used [-Wunused-but-set-variable]
    2633 |  uint32_t gpu_id;
         |           ^~~~~~
   In file included from drivers/gpu/drm/amd/display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/display/dc/dm_services_types.h:30,
                    from drivers/gpu/drm/amd/include/dm_pp_interface.h:26,
                    from drivers/gpu/drm/amd/amdgpu/amdgpu.h:52,
                    from drivers/gpu/drm/amd/backport/include/kcl/kcl_amdgpu.h:5,
                    from drivers/gpu/drm/amd/backport/backport.h:17,
                    from <command-line>:
   At top level:
   drivers/gpu/drm/amd/display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
      67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
         |                                ^~~~~~~~~~~~~
--
>> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_doorbell.c:186:6: warning: no previous prototype for 'kfd_doorbell_unmap_locked' [-Wmissing-prototypes]
     186 | void kfd_doorbell_unmap_locked(struct kfd_process_device *pdd)
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/display/dc/dm_services_types.h:30,
                    from drivers/gpu/drm/amd/include/dm_pp_interface.h:26,
                    from drivers/gpu/drm/amd/amdgpu/amdgpu.h:52,
                    from drivers/gpu/drm/amd/backport/include/kcl/kcl_amdgpu.h:5,
                    from drivers/gpu/drm/amd/backport/backport.h:17,
                    from <command-line>:
   drivers/gpu/drm/amd/display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
      67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
         |                                ^~~~~~~~~~~~~
--
   drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:169:6: warning: no previous prototype for 'increment_queue_count' [-Wmissing-prototypes]
     169 | void increment_queue_count(struct device_queue_manager *dqm,
         |      ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:177:6: warning: no previous prototype for 'decrement_queue_count' [-Wmissing-prototypes]
     177 | void decrement_queue_count(struct device_queue_manager *dqm,
         |      ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c: In function 'resume_single_queue':
>> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:704:11: warning: variable 'pd_base' set but not used [-Wunused-but-set-variable]
     704 |  uint64_t pd_base;
         |           ^~~~~~~
   drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c: At top level:
>> drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_device_queue_manager.c:2234:6: warning: no previous prototype for 'copy_context_work_handler' [-Wmissing-prototypes]
    2234 | void copy_context_work_handler (struct work_struct *work)
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/display/dc/dm_services_types.h:30,
                    from drivers/gpu/drm/amd/include/dm_pp_interface.h:26,
                    from drivers/gpu/drm/amd/amdgpu/amdgpu.h:52,
                    from drivers/gpu/drm/amd/backport/include/kcl/kcl_amdgpu.h:5,
                    from drivers/gpu/drm/amd/backport/backport.h:17,
                    from <command-line>:
   drivers/gpu/drm/amd/display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
      67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
         |                                ^~~~~~~~~~~~~
--
   In file included from arch/powerpc/include/asm/bug.h:109,
                    from include/linux/bug.h:5,
                    from arch/powerpc/include/asm/cmpxchg.h:8,
                    from arch/powerpc/include/asm/atomic.h:11,
                    from include/linux/atomic.h:7,
                    from include/linux/rcupdate.h:25,
                    from include/kcl/kcl_rcupdate.h:4,
                    from include/kcl/kcl_fence.h:5,
                    from include/kcl/kcl_fence_backport.h:3,
                    from drivers/gpu/drm/amd/backport/backport.h:10,
                    from <command-line>:
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c: In function 'unreserve_mem_limit':
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c:187:34: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
     187 |    WARN_ONCE(adev->kfd.vram_used < 0,
         |                                  ^
   include/asm-generic/bug.h:151:27: note: in definition of macro 'WARN_ONCE'
     151 |  int __ret_warn_once = !!(condition);   \
         |                           ^~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c: In function 'amdgpu_amdkfd_gpuvm_export_dmabuf':
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c:1916:24: warning: variable 'adev' set but not used [-Wunused-but-set-variable]
    1916 |  struct amdgpu_device *adev = NULL;
         |                        ^~~~
   In file included from drivers/gpu/drm/amd/display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/display/dc/dm_services_types.h:30,
                    from drivers/gpu/drm/amd/include/dm_pp_interface.h:26,
                    from drivers/gpu/drm/amd/amdgpu/amdgpu.h:52,
                    from drivers/gpu/drm/amd/backport/include/kcl/kcl_amdgpu.h:5,
                    from drivers/gpu/drm/amd/backport/backport.h:17,
                    from <command-line>:
   At top level:
   drivers/gpu/drm/amd/display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
      67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
         |                                ^~~~~~~~~~~~~
--
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:106:6: warning: no previous prototype for 'kgd_gfx_v9_program_sh_mem_settings' [-Wmissing-prototypes]
     106 | void kgd_gfx_v9_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:123:5: warning: no previous prototype for 'kgd_gfx_v9_set_pasid_vmid_mapping' [-Wmissing-prototypes]
     123 | int kgd_gfx_v9_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:184:5: warning: no previous prototype for 'kgd_gfx_v9_init_interrupts' [-Wmissing-prototypes]
     184 | int kgd_gfx_v9_init_interrupts(struct kgd_dev *kgd, uint32_t pipe_id)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:243:5: warning: no previous prototype for 'kgd_gfx_v9_hqd_load' [-Wmissing-prototypes]
     243 | int kgd_gfx_v9_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
         |     ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:323:5: warning: no previous prototype for 'kgd_gfx_v9_hiq_mqd_load' [-Wmissing-prototypes]
     323 | int kgd_gfx_v9_hiq_mqd_load(struct kgd_dev *kgd, void *mqd,
         |     ^~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:376:5: warning: no previous prototype for 'kgd_gfx_v9_hqd_dump' [-Wmissing-prototypes]
     376 | int kgd_gfx_v9_hqd_dump(struct kgd_dev *kgd,
         |     ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:510:6: warning: no previous prototype for 'kgd_gfx_v9_hqd_is_occupied' [-Wmissing-prototypes]
     510 | bool kgd_gfx_v9_hqd_is_occupied(struct kgd_dev *kgd, uint64_t queue_address,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:551:5: warning: no previous prototype for 'kgd_gfx_v9_hqd_destroy' [-Wmissing-prototypes]
     551 | int kgd_gfx_v9_hqd_destroy(struct kgd_dev *kgd, void *mqd,
         |     ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:641:6: warning: no previous prototype for 'kgd_gfx_v9_get_atc_vmid_pasid_mapping_info' [-Wmissing-prototypes]
     641 | bool kgd_gfx_v9_get_atc_vmid_pasid_mapping_info(struct kgd_dev *kgd,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:654:5: warning: no previous prototype for 'kgd_gfx_v9_address_watch_disable' [-Wmissing-prototypes]
     654 | int kgd_gfx_v9_address_watch_disable(struct kgd_dev *kgd)
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:678:5: warning: no previous prototype for 'kgd_gfx_v9_address_watch_execute' [-Wmissing-prototypes]
     678 | int kgd_gfx_v9_address_watch_execute(struct kgd_dev *kgd,
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:713:5: warning: no previous prototype for 'kgd_gfx_v9_wave_control_execute' [-Wmissing-prototypes]
     713 | int kgd_gfx_v9_wave_control_execute(struct kgd_dev *kgd,
         |     ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:738:10: warning: no previous prototype for 'kgd_gfx_v9_address_watch_get_offset' [-Wmissing-prototypes]
     738 | uint32_t kgd_gfx_v9_address_watch_get_offset(struct kgd_dev *kgd,
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:746:10: warning: no previous prototype for 'kgd_gfx_v9_enable_debug_trap' [-Wmissing-prototypes]
     746 | uint32_t kgd_gfx_v9_enable_debug_trap(struct kgd_dev *kgd,
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:777:10: warning: no previous prototype for 'kgd_gfx_v9_disable_debug_trap' [-Wmissing-prototypes]
     777 | uint32_t kgd_gfx_v9_disable_debug_trap(struct kgd_dev *kgd)
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:790:10: warning: no previous prototype for 'kgd_gfx_v9_set_wave_launch_trap_override' [-Wmissing-prototypes]
     790 | uint32_t kgd_gfx_v9_set_wave_launch_trap_override(struct kgd_dev *kgd,
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:819:10: warning: no previous prototype for 'kgd_gfx_v9_set_wave_launch_mode' [-Wmissing-prototypes]
     819 | uint32_t kgd_gfx_v9_set_wave_launch_mode(struct kgd_dev *kgd,
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:863:6: warning: no previous prototype for 'kgd_gfx_v9_get_iq_wait_times' [-Wmissing-prototypes]
     863 | void kgd_gfx_v9_get_iq_wait_times(struct kgd_dev *kgd,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c:888:6: warning: no previous prototype for 'kgd_gfx_v9_build_grace_period_packet_info' [-Wmissing-prototypes]
     888 | void kgd_gfx_v9_build_grace_period_packet_info(struct kgd_dev *kgd,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/display/dc/dm_services_types.h:30,
                    from drivers/gpu/drm/amd/include/dm_pp_interface.h:26,
                    from drivers/gpu/drm/amd/amdgpu/amdgpu.h:52,
                    from drivers/gpu/drm/amd/backport/include/kcl/kcl_amdgpu.h:5,
                    from drivers/gpu/drm/amd/backport/backport.h:17,
                    from <command-line>:
   drivers/gpu/drm/amd/display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
      67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
         |                                ^~~~~~~~~~~~~
--
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c:760:10: warning: no previous prototype for 'kgd_gfx_v10_enable_debug_trap' [-Wmissing-prototypes]
     760 | uint32_t kgd_gfx_v10_enable_debug_trap(struct kgd_dev *kgd,
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c:791:10: warning: no previous prototype for 'kgd_gfx_v10_disable_debug_trap' [-Wmissing-prototypes]
     791 | uint32_t kgd_gfx_v10_disable_debug_trap(struct kgd_dev *kgd)
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c:804:10: warning: no previous prototype for 'kgd_gfx_v10_set_wave_launch_trap_override' [-Wmissing-prototypes]
     804 | uint32_t kgd_gfx_v10_set_wave_launch_trap_override(struct kgd_dev *kgd,
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c:833:10: warning: no previous prototype for 'kgd_gfx_v10_set_wave_launch_mode' [-Wmissing-prototypes]
     833 | uint32_t kgd_gfx_v10_set_wave_launch_mode(struct kgd_dev *kgd,
         |          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c:876:6: warning: no previous prototype for 'kgd_gfx_v10_get_iq_wait_times' [-Wmissing-prototypes]
     876 | void kgd_gfx_v10_get_iq_wait_times(struct kgd_dev *kgd,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c:885:6: warning: no previous prototype for 'kgd_gfx_v10_build_grace_period_packet_info' [-Wmissing-prototypes]
     885 | void kgd_gfx_v10_build_grace_period_packet_info(struct kgd_dev *kgd,
         |      ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/display/dc/dc_types.h:33,
                    from drivers/gpu/drm/amd/display/dc/dm_services_types.h:30,
                    from drivers/gpu/drm/amd/include/dm_pp_interface.h:26,
                    from drivers/gpu/drm/amd/amdgpu/amdgpu.h:52,
                    from drivers/gpu/drm/amd/backport/include/kcl/kcl_amdgpu.h:5,
                    from drivers/gpu/drm/amd/backport/backport.h:17,
                    from <command-line>:
   drivers/gpu/drm/amd/display/include/fixed31_32.h:76:32: warning: 'dc_fixpt_ln2_div_2' defined but not used [-Wunused-const-variable=]
      76 | static const struct fixed31_32 dc_fixpt_ln2_div_2 = { 1488522236LL };
         |                                ^~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:75:32: warning: 'dc_fixpt_ln2' defined but not used [-Wunused-const-variable=]
      75 | static const struct fixed31_32 dc_fixpt_ln2 = { 2977044471LL };
         |                                ^~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:74:32: warning: 'dc_fixpt_e' defined but not used [-Wunused-const-variable=]
      74 | static const struct fixed31_32 dc_fixpt_e = { 11674931555LL };
         |                                ^~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:73:32: warning: 'dc_fixpt_two_pi' defined but not used [-Wunused-const-variable=]
      73 | static const struct fixed31_32 dc_fixpt_two_pi = { 26986075409LL };
         |                                ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:72:32: warning: 'dc_fixpt_pi' defined but not used [-Wunused-const-variable=]
      72 | static const struct fixed31_32 dc_fixpt_pi = { 13493037705LL };
         |                                ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/include/fixed31_32.h:67:32: warning: 'dc_fixpt_zero' defined but not used [-Wunused-const-variable=]
      67 | static const struct fixed31_32 dc_fixpt_zero = { 0 };
         |                                ^~~~~~~~~~~~~
--
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: warning: initialized field overwritten [-Woverride-init]
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:280:2: note: in expansion of macro 'stream_enc_regs'
     280 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: note: (near initialization for 'stream_enc_regs[0].TMDS_CNTL')
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:280:2: note: in expansion of macro 'stream_enc_regs'
     280 |  stream_enc_regs(0),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: warning: initialized field overwritten [-Woverride-init]
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:281:2: note: in expansion of macro 'stream_enc_regs'
     281 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: note: (near initialization for 'stream_enc_regs[1].TMDS_CNTL')
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:281:2: note: in expansion of macro 'stream_enc_regs'
     281 |  stream_enc_regs(1),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: warning: initialized field overwritten [-Woverride-init]
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:282:2: note: in expansion of macro 'stream_enc_regs'
     282 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: note: (near initialization for 'stream_enc_regs[2].TMDS_CNTL')
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:282:2: note: in expansion of macro 'stream_enc_regs'
     282 |  stream_enc_regs(2),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: warning: initialized field overwritten [-Woverride-init]
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:283:2: note: in expansion of macro 'stream_enc_regs'
     283 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: note: (near initialization for 'stream_enc_regs[3].TMDS_CNTL')
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:283:2: note: in expansion of macro 'stream_enc_regs'
     283 |  stream_enc_regs(3),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: warning: initialized field overwritten [-Woverride-init]
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:284:2: note: in expansion of macro 'stream_enc_regs'
     284 |  stream_enc_regs(4),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: note: (near initialization for 'stream_enc_regs[4].TMDS_CNTL')
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:284:2: note: in expansion of macro 'stream_enc_regs'
     284 |  stream_enc_regs(4),
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: warning: initialized field overwritten [-Woverride-init]
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:285:2: note: in expansion of macro 'stream_enc_regs'
     285 |  stream_enc_regs(5)
         |  ^~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:276:15: note: (near initialization for 'stream_enc_regs[5].TMDS_CNTL')
     276 |  .TMDS_CNTL = 0,\
         |               ^
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:285:2: note: in expansion of macro 'stream_enc_regs'
     285 |  stream_enc_regs(5)
         |  ^~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:62:
>> drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35505:111: warning: initialized field overwritten [-Woverride-init]
   35505 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT                                              0x1f
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35505:111: note: in definition of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
   35505 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT                                              0x1f
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_aux.h:154:2: note: in expansion of macro 'AUX_SF'
     154 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:297:2: note: in expansion of macro 'DCE12_AUX_MASK_SH_LIST'
     297 |  DCE12_AUX_MASK_SH_LIST(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35505:111: note: (near initialization for 'aux_shift.AUX_SW_AUTOINCREMENT_DISABLE')
   35505 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT                                              0x1f
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35505:111: note: in definition of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT'
   35505 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE__SHIFT                                              0x1f
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_aux.h:154:2: note: in expansion of macro 'AUX_SF'
     154 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:297:2: note: in expansion of macro 'DCE12_AUX_MASK_SH_LIST'
     297 |  DCE12_AUX_MASK_SH_LIST(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35509:111: warning: initialized field overwritten [-Woverride-init]
   35509 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK                                                0x80000000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35509:111: note: in definition of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
   35509 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK                                                0x80000000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_aux.h:154:2: note: in expansion of macro 'AUX_SF'
     154 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:301:2: note: in expansion of macro 'DCE12_AUX_MASK_SH_LIST'
     301 |  DCE12_AUX_MASK_SH_LIST(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35509:111: note: (near initialization for 'aux_mask.AUX_SW_AUTOINCREMENT_DISABLE')
   35509 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK                                                0x80000000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:35509:111: note: in definition of macro 'DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK'
   35509 | #define DP_AUX0_AUX_SW_DATA__AUX_SW_AUTOINCREMENT_DISABLE_MASK                                                0x80000000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_aux.h:154:2: note: in expansion of macro 'AUX_SF'
     154 |  AUX_SF(DP_AUX0_AUX_SW_DATA, AUX_SW_AUTOINCREMENT_DISABLE, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:301:2: note: in expansion of macro 'DCE12_AUX_MASK_SH_LIST'
     301 |  DCE12_AUX_MASK_SH_LIST(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:62:
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:16388:111: warning: initialized field overwritten [-Woverride-init]
   16388 | #define FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__SHIFT                                             0x10
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:85:16: note: in expansion of macro 'FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__SHIFT'
      85 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:170:2: note: in expansion of macro 'OPP_SF'
     170 |  OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:319:2: note: in expansion of macro 'OPP_COMMON_MASK_SH_LIST_DCE_120'
     319 |  OPP_COMMON_MASK_SH_LIST_DCE_120(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:16388:111: note: (near initialization for 'opp_shift.FMT_TEMPORAL_DITHER_EN')
   16388 | #define FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__SHIFT                                             0x10
         |                                                                                                               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:85:16: note: in expansion of macro 'FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN__SHIFT'
      85 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:170:2: note: in expansion of macro 'OPP_SF'
     170 |  OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:319:2: note: in expansion of macro 'OPP_COMMON_MASK_SH_LIST_DCE_120'
     319 |  OPP_COMMON_MASK_SH_LIST_DCE_120(__SHIFT)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:16405:111: warning: initialized field overwritten [-Woverride-init]
   16405 | #define FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MASK                                               0x00010000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:85:16: note: in expansion of macro 'FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MASK'
      85 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:170:2: note: in expansion of macro 'OPP_SF'
     170 |  OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:323:2: note: in expansion of macro 'OPP_COMMON_MASK_SH_LIST_DCE_120'
     323 |  OPP_COMMON_MASK_SH_LIST_DCE_120(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h:16405:111: note: (near initialization for 'opp_mask.FMT_TEMPORAL_DITHER_EN')
   16405 | #define FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MASK                                               0x00010000L
         |                                                                                                               ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:85:16: note: in expansion of macro 'FMT0_FMT_BIT_DEPTH_CONTROL__FMT_TEMPORAL_DITHER_EN_MASK'
      85 |  .field_name = reg_name ## __ ## field_name ## post_fix
         |                ^~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_opp.h:170:2: note: in expansion of macro 'OPP_SF'
     170 |  OPP_SF(FMT0_FMT_BIT_DEPTH_CONTROL, FMT_TEMPORAL_DITHER_EN, mask_sh),\
         |  ^~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:323:2: note: in expansion of macro 'OPP_COMMON_MASK_SH_LIST_DCE_120'
     323 |  OPP_COMMON_MASK_SH_LIST_DCE_120(_MASK)
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:420:32: warning: no previous prototype for 'dce120_opp_create' [-Wmissing-prototypes]
     420 | struct output_pixel_processor *dce120_opp_create(
         |                                ^~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:434:17: warning: no previous prototype for 'dce120_aux_engine_create' [-Wmissing-prototypes]
     434 | struct dce_aux *dce120_aux_engine_create(
         |                 ^~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:472:20: warning: no previous prototype for 'dce120_i2c_hw_create' [-Wmissing-prototypes]
     472 | struct dce_i2c_hw *dce120_i2c_hw_create(
         |                    ^~~~~~~~~~~~~~~~~~~~
   In file included from drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:64:
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:70:2: note: in expansion of macro 'SRII'
      70 |  SRII(PIXEL_RATE_CNTL, blk, 0), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'hwseq_reg.PIXEL_RATE_CNTL[0]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:70:2: note: in expansion of macro 'SRII'
      70 |  SRII(PIXEL_RATE_CNTL, blk, 0), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:71:2: note: in expansion of macro 'SRII'
      71 |  SRII(PIXEL_RATE_CNTL, blk, 1), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'hwseq_reg.PIXEL_RATE_CNTL[1]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:71:2: note: in expansion of macro 'SRII'
      71 |  SRII(PIXEL_RATE_CNTL, blk, 1), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:72:2: note: in expansion of macro 'SRII'
      72 |  SRII(PIXEL_RATE_CNTL, blk, 2), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'hwseq_reg.PIXEL_RATE_CNTL[2]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:72:2: note: in expansion of macro 'SRII'
      72 |  SRII(PIXEL_RATE_CNTL, blk, 2), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:73:2: note: in expansion of macro 'SRII'
      73 |  SRII(PIXEL_RATE_CNTL, blk, 3), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'hwseq_reg.PIXEL_RATE_CNTL[3]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:73:2: note: in expansion of macro 'SRII'
      73 |  SRII(PIXEL_RATE_CNTL, blk, 3), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:74:2: note: in expansion of macro 'SRII'
      74 |  SRII(PIXEL_RATE_CNTL, blk, 4), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'hwseq_reg.PIXEL_RATE_CNTL[4]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:74:2: note: in expansion of macro 'SRII'
      74 |  SRII(PIXEL_RATE_CNTL, blk, 4), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:75:2: note: in expansion of macro 'SRII'
      75 |  SRII(PIXEL_RATE_CNTL, blk, 5)
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'hwseq_reg.PIXEL_RATE_CNTL[5]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:75:2: note: in expansion of macro 'SRII'
      75 |  SRII(PIXEL_RATE_CNTL, blk, 5)
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: warning: initialized field overwritten [-Woverride-init]
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: in definition of macro 'DCE_BASE__INST0_SEG2'
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:138:15: note: in expansion of macro 'BASE'
     138 |   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
         |               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:31:2: note: in expansion of macro 'SR'
      31 |  SR(LVTMA_PWRSEQ_CNTL), \
         |  ^~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:138:2: note: in expansion of macro 'BL_REG_LIST'
     138 |  BL_REG_LIST()
         |  ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: (near initialization for 'hwseq_reg.LVTMA_PWRSEQ_CNTL')
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: in definition of macro 'DCE_BASE__INST0_SEG2'
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:138:15: note: in expansion of macro 'BASE'
     138 |   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
         |               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:31:2: note: in expansion of macro 'SR'
      31 |  SR(LVTMA_PWRSEQ_CNTL), \
         |  ^~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:138:2: note: in expansion of macro 'BL_REG_LIST'
     138 |  BL_REG_LIST()
         |  ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: warning: initialized field overwritten [-Woverride-init]
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: in definition of macro 'DCE_BASE__INST0_SEG2'
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:138:15: note: in expansion of macro 'BASE'
     138 |   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
         |               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:32:2: note: in expansion of macro 'SR'
      32 |  SR(LVTMA_PWRSEQ_STATE)
         |  ^~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:138:2: note: in expansion of macro 'BL_REG_LIST'
     138 |  BL_REG_LIST()
         |  ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: (near initialization for 'hwseq_reg.LVTMA_PWRSEQ_STATE')
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: in definition of macro 'DCE_BASE__INST0_SEG2'
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:138:15: note: in expansion of macro 'BASE'
     138 |   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
         |               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:32:2: note: in expansion of macro 'SR'
      32 |  SR(LVTMA_PWRSEQ_STATE)
         |  ^~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:138:2: note: in expansion of macro 'BL_REG_LIST'
     138 |  BL_REG_LIST()
         |  ^~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:754:3: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     754 |   HWSEQ_DCE120_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:70:2: note: in expansion of macro 'SRII'
      70 |  SRII(PIXEL_RATE_CNTL, blk, 0), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'dce121_hwseq_reg.PIXEL_RATE_CNTL[0]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:70:2: note: in expansion of macro 'SRII'
      70 |  SRII(PIXEL_RATE_CNTL, blk, 0), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:71:2: note: in expansion of macro 'SRII'
      71 |  SRII(PIXEL_RATE_CNTL, blk, 1), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'dce121_hwseq_reg.PIXEL_RATE_CNTL[1]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:71:2: note: in expansion of macro 'SRII'
      71 |  SRII(PIXEL_RATE_CNTL, blk, 1), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:72:2: note: in expansion of macro 'SRII'
      72 |  SRII(PIXEL_RATE_CNTL, blk, 2), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'dce121_hwseq_reg.PIXEL_RATE_CNTL[2]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:72:2: note: in expansion of macro 'SRII'
      72 |  SRII(PIXEL_RATE_CNTL, blk, 2), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:73:2: note: in expansion of macro 'SRII'
      73 |  SRII(PIXEL_RATE_CNTL, blk, 3), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'dce121_hwseq_reg.PIXEL_RATE_CNTL[3]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:73:2: note: in expansion of macro 'SRII'
      73 |  SRII(PIXEL_RATE_CNTL, blk, 3), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:74:2: note: in expansion of macro 'SRII'
      74 |  SRII(PIXEL_RATE_CNTL, blk, 4), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'dce121_hwseq_reg.PIXEL_RATE_CNTL[4]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:74:2: note: in expansion of macro 'SRII'
      74 |  SRII(PIXEL_RATE_CNTL, blk, 4), \
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
>> drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: warning: initialized field overwritten [-Woverride-init]
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:75:2: note: in expansion of macro 'SRII'
      75 |  SRII(PIXEL_RATE_CNTL, blk, 5)
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: (near initialization for 'dce121_hwseq_reg.PIXEL_RATE_CNTL[5]')
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:276:51: note: in definition of macro 'DCE_BASE__INST0_SEG1'
     276 | #define DCE_BASE__INST0_SEG1                      0x000000C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:750:18: note: in expansion of macro 'BASE'
     750 |  .reg_name[id] = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
         |                  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:75:2: note: in expansion of macro 'SRII'
      75 |  SRII(PIXEL_RATE_CNTL, blk, 5)
         |  ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:132:2: note: in expansion of macro 'HWSEQ_PIXEL_RATE_REG_LIST'
     132 |  HWSEQ_PIXEL_RATE_REG_LIST(CRTC), \
         |  ^~~~~~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: warning: initialized field overwritten [-Woverride-init]
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: in definition of macro 'DCE_BASE__INST0_SEG2'
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:138:15: note: in expansion of macro 'BASE'
     138 |   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
         |               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:31:2: note: in expansion of macro 'SR'
      31 |  SR(LVTMA_PWRSEQ_CNTL), \
         |  ^~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:138:2: note: in expansion of macro 'BL_REG_LIST'
     138 |  BL_REG_LIST()
         |  ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: (near initialization for 'dce121_hwseq_reg.LVTMA_PWRSEQ_CNTL')
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: in definition of macro 'DCE_BASE__INST0_SEG2'
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:135:2: note: in expansion of macro 'BASE_INNER'
     135 |  BASE_INNER(seg)
         |  ^~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:138:15: note: in expansion of macro 'BASE'
     138 |   .reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
         |               ^~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:31:2: note: in expansion of macro 'SR'
      31 |  SR(LVTMA_PWRSEQ_CNTL), \
         |  ^~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:138:2: note: in expansion of macro 'BL_REG_LIST'
     138 |  BL_REG_LIST()
         |  ^~~~~~~~~~~
   drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h:141:2: note: in expansion of macro 'HWSEQ_DCE120_REG_LIST'
     141 |  HWSEQ_DCE120_REG_LIST(),\
         |  ^~~~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/amdgpu/../display/dc/dce120/dce120_resource.c:767:3: note: in expansion of macro 'HWSEQ_VG20_REG_LIST'
     767 |   HWSEQ_VG20_REG_LIST()
         |   ^~~~~~~~~~~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: warning: initialized field overwritten [-Woverride-init]
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
         |                                                   ^~~~~~~~~~
   drivers/gpu/drm/amd/include/vega10_ip_offset.h:277:51: note: in definition of macro 'DCE_BASE__INST0_SEG2'
     277 | #define DCE_BASE__INST0_SEG2                      0x000034C0
..

vim +/gpu_id +2633 drivers/gpu/drm/amd/amdgpu/../amdkfd/kfd_chardev.c

838e2cab3ec03de Felix Kuehling 2020-04-23  2621  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2622  static int kfd_ioctl_dbg_set_debug_trap(struct file *filep,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2623  				struct kfd_process *p, void *data)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2624  {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2625  	struct kfd_ioctl_dbg_trap_args *args = data;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2626  	struct kfd_process_device *pdd = NULL;
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2627  	struct task_struct *thread = NULL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2628  	int r = 0;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2629  	struct kfd_dev *dev = NULL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2630  	struct kfd_process *target = NULL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2631  	struct pid *pid = NULL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2632  	uint32_t *queue_id_array = NULL;
4f58c3498a304d3 Felix Kuehling 2020-04-23 @2633  	uint32_t gpu_id;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2634  	uint32_t debug_trap_action;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2635  	uint32_t data1;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2636  	uint32_t data2;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2637  	uint32_t data3;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2638  	bool need_device;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2639  	bool need_qid_array;
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2640  	bool need_proc_create = false;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2641  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2642  	debug_trap_action = args->op;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2643  	gpu_id = args->gpu_id;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2644  	data1 = args->data1;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2645  	data2 = args->data2;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2646  	data3 = args->data3;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2647  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2648  	if (sched_policy == KFD_SCHED_POLICY_NO_HWS) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2649  		pr_err("Unsupported sched_policy: %i", sched_policy);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2650  		r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2651  		goto out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2652  	}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2653  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2654  	need_device =
4f58c3498a304d3 Felix Kuehling 2020-04-23  2655  		debug_trap_action != KFD_IOC_DBG_TRAP_NODE_SUSPEND &&
4f58c3498a304d3 Felix Kuehling 2020-04-23  2656  		debug_trap_action != KFD_IOC_DBG_TRAP_NODE_RESUME &&
4f58c3498a304d3 Felix Kuehling 2020-04-23  2657  		debug_trap_action != KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT &&
4f58c3498a304d3 Felix Kuehling 2020-04-23  2658  		debug_trap_action != KFD_IOC_DBG_TRAP_GET_VERSION;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2659  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2660  	need_qid_array =
4f58c3498a304d3 Felix Kuehling 2020-04-23  2661  		debug_trap_action == KFD_IOC_DBG_TRAP_NODE_SUSPEND ||
4f58c3498a304d3 Felix Kuehling 2020-04-23  2662  		debug_trap_action == KFD_IOC_DBG_TRAP_NODE_RESUME;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2663  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2664  	pid = find_get_pid(args->pid);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2665  	if (!pid) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2666  		pr_err("Cannot find pid info for %i\n",
4f58c3498a304d3 Felix Kuehling 2020-04-23  2667  				args->pid);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2668  		r =  -ESRCH;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2669  		goto out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2670  	}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2671  
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2672  	thread = get_pid_task(pid, PIDTYPE_PID);
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2673  
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2674  	rcu_read_lock();
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2675  	need_proc_create =
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2676  		debug_trap_action == KFD_IOC_DBG_TRAP_ENABLE &&
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2677  		data1 == 1 && thread && thread != current &&
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2678  		ptrace_parent(thread) == current;
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2679  	rcu_read_unlock();
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2680  
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2681  	target = need_proc_create ?
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2682  		kfd_create_process(thread) : kfd_lookup_process_by_pid(pid);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2683  	if (!target) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2684  		pr_err("Cannot find process info info for %i\n",
4f58c3498a304d3 Felix Kuehling 2020-04-23  2685  				args->pid);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2686  		r = -ESRCH;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2687  		goto out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2688  	}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2689  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2690  	if (target != p) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2691  		bool is_debugger_attached = false;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2692  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2693  		rcu_read_lock();
4f58c3498a304d3 Felix Kuehling 2020-04-23  2694  		if (ptrace_parent(target->lead_thread) == current)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2695  			is_debugger_attached = true;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2696  		rcu_read_unlock();
4f58c3498a304d3 Felix Kuehling 2020-04-23  2697  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2698  		if (!is_debugger_attached) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2699  			pr_err("Cannot debug process\n");
4f58c3498a304d3 Felix Kuehling 2020-04-23  2700  			r = -ESRCH;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2701  			goto out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2702  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2703  	}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2704  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2705  	mutex_lock(&target->mutex);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2706  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2707  	if (need_device) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2708  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2709  		dev = kfd_device_by_id(args->gpu_id);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2710  		if (!dev) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2711  			r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2712  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2713  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2714  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2715  		if (dev->device_info->asic_family < CHIP_VEGA10) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2716  			r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2717  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2718  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2719  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2720  		pdd = kfd_get_process_device_data(dev, target);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2721  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2722  		if (!pdd) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2723  			r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2724  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2725  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2726  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2727  		if ((pdd->is_debugging_enabled == false) &&
4f58c3498a304d3 Felix Kuehling 2020-04-23  2728  				((debug_trap_action == KFD_IOC_DBG_TRAP_ENABLE
4f58c3498a304d3 Felix Kuehling 2020-04-23  2729  				  && data1 == 1) ||
4f58c3498a304d3 Felix Kuehling 2020-04-23  2730  				 (debug_trap_action ==
4f58c3498a304d3 Felix Kuehling 2020-04-23  2731  				  KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE &&
4f58c3498a304d3 Felix Kuehling 2020-04-23  2732  				  data1 != 0))) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2733  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2734  			/* We need to reserve the debug trap vmid if we haven't
4f58c3498a304d3 Felix Kuehling 2020-04-23  2735  			 * yet, and are enabling trap debugging, or we are
4f58c3498a304d3 Felix Kuehling 2020-04-23  2736  			 * setting the wave launch mode to something other than
4f58c3498a304d3 Felix Kuehling 2020-04-23  2737  			 * normal==0.
4f58c3498a304d3 Felix Kuehling 2020-04-23  2738  			 */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2739  			r = reserve_debug_trap_vmid(dev->dqm);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2740  			if (r)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2741  				goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2742  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2743  			pdd->is_debugging_enabled = true;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2744  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2745  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2746  		if (!pdd->is_debugging_enabled) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2747  			pr_err("Debugging is not enabled for this device\n");
4f58c3498a304d3 Felix Kuehling 2020-04-23  2748  			r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2749  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2750  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2751  	} else if (need_qid_array) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2752  		/* data 2 has the number of queue IDs */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2753  		size_t queue_id_array_size = sizeof(uint32_t) * data2;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2754  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2755  		queue_id_array = kzalloc(queue_id_array_size, GFP_KERNEL);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2756  		if (!queue_id_array) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2757  			r = -ENOMEM;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2758  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2759  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2760  		/* We need to copy the queue IDs from userspace */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2761  		if (copy_from_user(queue_id_array,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2762  					(uint32_t *) args->ptr,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2763  					queue_id_array_size)) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2764  			r = -EFAULT;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2765  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2766  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2767  	}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2768  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2769  	switch (debug_trap_action) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2770  	case KFD_IOC_DBG_TRAP_ENABLE:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2771  		switch (data1) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2772  		case 0:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2773  			pdd->debug_trap_enabled = false;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2774  			r = dev->kfd2kgd->disable_debug_trap(dev->kgd);
b1af3d0d9aad526 Jonathan Kim   2020-03-27  2775  			fput(pdd->dbg_ev_file);
b1af3d0d9aad526 Jonathan Kim   2020-03-27  2776  			pdd->dbg_ev_file = NULL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2777  			break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2778  		case 1:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2779  			pdd->debug_trap_enabled = true;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2780  			r = dev->kfd2kgd->enable_debug_trap(dev->kgd,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2781  					pdd->trap_debug_wave_launch_mode,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2782  					dev->vm_info.last_vmid_kfd);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2783  			if (r)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2784  				break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2785  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2786  			r = kfd_dbg_ev_enable(pdd);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2787  			if (r >= 0) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2788  				args->data3 = r;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2789  				r = 0;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2790  			} else {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2791  				pdd->debug_trap_enabled = false;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2792  				dev->kfd2kgd->disable_debug_trap(dev->kgd);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2793  			}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2794  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2795  			break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2796  		default:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2797  			pr_err("Invalid trap enable option: %i\n",
4f58c3498a304d3 Felix Kuehling 2020-04-23  2798  					data1);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2799  			r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2800  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2801  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2802  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2803  	case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2804  		if (data2 != 0) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2805  			/* On current hardware, we only support a trap
4f58c3498a304d3 Felix Kuehling 2020-04-23  2806  			 * mask value of 0.  This is because the debug
4f58c3498a304d3 Felix Kuehling 2020-04-23  2807  			 * trap mask is global and shared by all processes
4f58c3498a304d3 Felix Kuehling 2020-04-23  2808  			 * on current hardware.
4f58c3498a304d3 Felix Kuehling 2020-04-23  2809  			 */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2810  			pr_err("Invalid trap override option: %i\n",
4f58c3498a304d3 Felix Kuehling 2020-04-23  2811  					data2);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2812  			r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2813  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2814  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2815  		r = dev->kfd2kgd->set_wave_launch_trap_override(
4f58c3498a304d3 Felix Kuehling 2020-04-23  2816  				dev->kgd,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2817  				data1,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2818  				data2);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2819  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2820  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2821  	case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2822  		pdd->trap_debug_wave_launch_mode = data1;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2823  		r = dev->kfd2kgd->set_wave_launch_mode(
4f58c3498a304d3 Felix Kuehling 2020-04-23  2824  				dev->kgd,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2825  				data1,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2826  				dev->vm_info.last_vmid_kfd);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2827  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2828  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2829  	case KFD_IOC_DBG_TRAP_NODE_SUSPEND:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2830  		r = suspend_queues(target,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2831  				data2, /* Number of queues */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2832  				data3, /* Grace Period */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2833  				data1, /* Flags */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2834  				queue_id_array); /* array of queue ids */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2835  		if (r)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2836  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2837  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2838  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2839  	case KFD_IOC_DBG_TRAP_NODE_RESUME:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2840  		r = resume_queues(target,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2841  				data2, /* Number of queues */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2842  				data1, /* Flags */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2843  				queue_id_array); /* array of queue ids */
4f58c3498a304d3 Felix Kuehling 2020-04-23  2844  		if (r)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2845  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2846  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2847  	case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2848  		r = kfd_dbg_ev_query_debug_event(pdd, &args->data1,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2849  						 args->data2,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2850  						 &args->data3);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2851  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2852  	case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2853  		r = pqm_get_queue_snapshot(&target->pqm, args->data1,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2854  					   (void __user *)args->ptr,
4f58c3498a304d3 Felix Kuehling 2020-04-23  2855  					   args->data2);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2856  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2857  		args->data2 = r < 0 ? 0 : r;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2858  		if (r > 0)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2859  			r = 0;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2860  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2861  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2862  	case KFD_IOC_DBG_TRAP_GET_VERSION:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2863  		args->data1 = KFD_IOCTL_DBG_MAJOR_VERSION;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2864  		args->data2 = KFD_IOCTL_DBG_MINOR_VERSION;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2865  		break;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2866  	default:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2867  		pr_err("Invalid option: %i\n", debug_trap_action);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2868  		r = -EINVAL;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2869  	}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2870  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2871  	if (pdd && pdd->trap_debug_wave_launch_mode == 0 &&
4f58c3498a304d3 Felix Kuehling 2020-04-23  2872  			!pdd->debug_trap_enabled) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2873  		int result;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2874  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2875  		result = release_debug_trap_vmid(dev->dqm);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2876  		if (result) {
4f58c3498a304d3 Felix Kuehling 2020-04-23  2877  			pr_err("Failed to release debug VMID\n");
4f58c3498a304d3 Felix Kuehling 2020-04-23  2878  			r = result;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2879  			goto unlock_out;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2880  		}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2881  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2882  		pdd->is_debugging_enabled = false;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2883  	}
4f58c3498a304d3 Felix Kuehling 2020-04-23  2884  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2885  unlock_out:
4f58c3498a304d3 Felix Kuehling 2020-04-23  2886  	mutex_unlock(&target->mutex);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2887  
4f58c3498a304d3 Felix Kuehling 2020-04-23  2888  out:
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2889  	if (thread)
b86eed70dc8bf88 Jonathan Kim   2019-11-28  2890  		put_task_struct(thread);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2891  	if (pid)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2892  		put_pid(pid);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2893  	if (target)
4f58c3498a304d3 Felix Kuehling 2020-04-23  2894  		kfd_unref_process(target);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2895  	kfree(queue_id_array);
4f58c3498a304d3 Felix Kuehling 2020-04-23  2896  	return r;
4f58c3498a304d3 Felix Kuehling 2020-04-23  2897  }
4f58c3498a304d3 Felix Kuehling 2020-04-23  2898  

:::::: The code at line 2633 was first introduced by commit
:::::: 4f58c3498a304d334a814cbb9064eb904868fcff drm/amdkfd: Add new GPU debugging API

:::::: TO: Felix Kuehling <Felix.Kuehling at amd.com>
:::::: CC: Flora Cui <flora.cui at amd.com>

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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