[PATCH 2/3] drm/exynos: Scale the DSIM PHY HFP/HBP/HSA to lanes and bpp

[Marek Vasut]

The value programmed into horizontal porch and sync registers must be
scaled to the correct number of DSI lanes and bpp, make it so.

Signed-off-by: Marek Vasut <marex at denx.de>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Guido Günther <agx at sigxcpu.org>
Cc: Jaehoon Chung <jh80.chung at samsung.com>
Cc: Lucas Stach <l.stach at pengutronix.de>
Cc: Marek Szyprowski <m.szyprowski at samsung.com>
Cc: Michael Tretter <m.tretter at pengutronix.de>
Cc: NXP Linux Team <linux-imx at nxp.com>
Cc: Shawn Guo <shawnguo at kernel.org>
Cc: linux-arm-kernel at lists.infradead.org
Cc: linux-samsung-soc at vger.kernel.org
To: dri-devel at lists.freedesktop.org
--
NOTE: This depends on https://patchwork.kernel.org/project/dri-devel/list/?series=347439
---
 drivers/gpu/drm/bridge/samsung-dsim.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
index fbd87a74eb9f..42b49546dd00 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -740,20 +740,23 @@ static void samsung_dsim_set_display_mode(struct samsung_dsim *dsi)
 {
 	struct drm_display_mode *m = &dsi->mode;
 	unsigned int num_bits_resol = dsi->driver_data->num_bits_resol;
+	int bpp;
 	u32 reg;
 
 	if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO) {
+		bpp = mipi_dsi_pixel_format_to_bpp(dsi->format) / 8;
+
 		reg = DSIM_CMD_ALLOW(0xf)
 			| DSIM_STABLE_VFP(m->vsync_start - m->vdisplay)
 			| DSIM_MAIN_VBP(m->vtotal - m->vsync_end);
 		samsung_dsim_write(dsi, DSIM_MVPORCH_REG, reg);
 
-		reg = DSIM_MAIN_HFP(m->hsync_start - m->hdisplay)
-			| DSIM_MAIN_HBP(m->htotal - m->hsync_end);
+		reg = DSIM_MAIN_HFP((m->hsync_start - m->hdisplay) * bpp / dsi->lanes)
+			| DSIM_MAIN_HBP((m->htotal - m->hsync_end) * bpp / dsi->lanes);
 		samsung_dsim_write(dsi, DSIM_MHPORCH_REG, reg);
 
 		reg = DSIM_MAIN_VSA(m->vsync_end - m->vsync_start)
-			| DSIM_MAIN_HSA(m->hsync_end - m->hsync_start);
+			| DSIM_MAIN_HSA((m->hsync_end - m->hsync_start) * bpp / dsi->lanes);
 		samsung_dsim_write(dsi, DSIM_MSYNC_REG, reg);
 	}
 	reg =  DSIM_MAIN_HRESOL(m->hdisplay, num_bits_resol) |
-- 
2.28.0