[PATCH v10 2/3] drm: bridge: Add support for Cadence MHDP8546 DPI/DP bridge

kernel test robot lkp at intel.com
Mon Sep 14 15:48:22 UTC 2020


Hi Swapnil,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on robh/for-next]
[also build test WARNING on linus/master v5.9-rc5 next-20200914]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Swapnil-Jakhade/drm-Add-support-for-Cadence-MHDP8546-DPI-DP-bridge-and-J721E-wrapper/20200914-205242
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: s390-allyesconfig (attached as .config)
compiler: s390-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=s390 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp at intel.com>

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c: In function 'cdns_mhdp_fw_activate':
>> drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:749:10: warning: conversion from 'long unsigned int' to 'u32' {aka 'unsigned int'} changes value from '18446744073709551613' to '4294967293' [-Woverflow]
     749 |   writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
   drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c: In function 'cdns_mhdp_fill_host_caps':
   drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:1359:30: error: 'struct phy_attrs' has no member named 'max_link_rate'
    1359 |  link_rate = mhdp->phy->attrs.max_link_rate;
         |                              ^
   drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c: In function 'cdns_mhdp_attach':
   drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:1690:10: warning: conversion from 'long unsigned int' to 'u32' {aka 'unsigned int'} changes value from '18446744073709551613' to '4294967293' [-Woverflow]
    1690 |   writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
   drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c: In function 'cdns_mhdp_bridge_hpd_enable':
   drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c:2123:10: warning: conversion from 'long unsigned int' to 'u32' {aka 'unsigned int'} changes value from '18446744073709551613' to '4294967293' [-Woverflow]
    2123 |   writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,

# https://github.com/0day-ci/linux/commit/747d94aa1dc15ccc7712116aa9161477b0ff3e85
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Swapnil-Jakhade/drm-Add-support-for-Cadence-MHDP8546-DPI-DP-bridge-and-J721E-wrapper/20200914-205242
git checkout 747d94aa1dc15ccc7712116aa9161477b0ff3e85
vim +749 drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c

   692	
   693	static int cdns_mhdp_fw_activate(const struct firmware *fw,
   694					 struct cdns_mhdp_device *mhdp)
   695	{
   696		unsigned int reg;
   697		int ret;
   698	
   699		/* Release uCPU reset and stall it. */
   700		writel(CDNS_CPU_STALL, mhdp->regs + CDNS_APB_CTRL);
   701	
   702		memcpy_toio(mhdp->regs + CDNS_MHDP_IMEM, fw->data, fw->size);
   703	
   704		/* Leave debug mode, release stall */
   705		writel(0, mhdp->regs + CDNS_APB_CTRL);
   706	
   707		/*
   708		 * Wait for the KEEP_ALIVE "message" on the first 8 bits.
   709		 * Updated each sched "tick" (~2ms)
   710		 */
   711		ret = readl_poll_timeout(mhdp->regs + CDNS_KEEP_ALIVE, reg,
   712					 reg & CDNS_KEEP_ALIVE_MASK, 500,
   713					 CDNS_KEEP_ALIVE_TIMEOUT);
   714		if (ret) {
   715			dev_err(mhdp->dev,
   716				"device didn't give any life sign: reg %d\n", reg);
   717			return ret;
   718		}
   719	
   720		ret = cdns_mhdp_check_fw_version(mhdp);
   721		if (ret)
   722			return ret;
   723	
   724		/* Init events to 0 as it's not cleared by FW at boot but on read */
   725		readl(mhdp->regs + CDNS_SW_EVENT0);
   726		readl(mhdp->regs + CDNS_SW_EVENT1);
   727		readl(mhdp->regs + CDNS_SW_EVENT2);
   728		readl(mhdp->regs + CDNS_SW_EVENT3);
   729	
   730		/* Activate uCPU */
   731		ret = cdns_mhdp_set_firmware_active(mhdp, true);
   732		if (ret)
   733			return ret;
   734	
   735		spin_lock(&mhdp->start_lock);
   736	
   737		mhdp->hw_state = MHDP_HW_READY;
   738	
   739		/*
   740		 * Here we must keep the lock while enabling the interrupts
   741		 * since it would otherwise be possible that interrupt enable
   742		 * code is executed after the bridge is detached. The similar
   743		 * situation is not possible in attach()/detach() callbacks
   744		 * since the hw_state changes from MHDP_HW_READY to
   745		 * MHDP_HW_STOPPED happens only due to driver removal when
   746		 * bridge should already be detached.
   747		 */
   748		if (mhdp->bridge_attached)
 > 749			writel(~CDNS_APB_INT_MASK_SW_EVENT_INT,
   750			       mhdp->regs + CDNS_APB_INT_MASK);
   751	
   752		spin_unlock(&mhdp->start_lock);
   753	
   754		wake_up(&mhdp->fw_load_wq);
   755		dev_dbg(mhdp->dev, "DP FW activated\n");
   756	
   757		return 0;
   758	}
   759	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
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