[Intel-gfx] [RFC 1/5] drm/i915/dp: Program source OUI on eDP panels

[Jani Nikula]

On Tue, 15 Sep 2020, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> On Tue, Sep 15, 2020 at 01:29:35PM -0400, Lyude Paul wrote:
>> Since we're about to start adding support for Intel's magic HDR
>> backlight interface over DPCD, we need to ensure we're properly
>> programming this field so that Intel specific sink services are exposed.
>> Otherwise, 0x300-0x3ff will just read zeroes.
>> 
>> We also take care not to reprogram the source OUI if it already matches
>> what we expect. This is just to be careful so that we don't accidentally
>> take the panel out of any backlight control modes we found it in.

(For whatever reason I didn't receive the original message.)

>> 
>> Signed-off-by: Lyude Paul <lyude at redhat.com>
>> Cc: thaytan at noraisin.net
>> Cc: Vasily Khoruzhick <anarsoul at gmail.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 32 +++++++++++++++++++++++++
>>  1 file changed, 32 insertions(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 4bd10456ad188..b591672ec4eab 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -3428,6 +3428,7 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
>>  void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>>  {
>>  	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>> +	u8 edp_oui[] = { 0x00, 0xaa, 0x01 };
>
> what are these values?

An OUI lookup confirms these are Intel OUI.

>
>>  	int ret, i;
>>  
>>  	/* Should have a valid DPCD by this point */
>> @@ -3443,6 +3444,14 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>>  	} else {
>>  		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
>>  
>> +		/* Write the source OUI as early as possible */
>> +		if (intel_dp_is_edp(intel_dp)) {
>> +			ret = drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, edp_oui,
>> +						sizeof(edp_oui));
>> +			if (ret < 0)
>> +				drm_err(&i915->drm, "Failed to write eDP source OUI\n");
>> +		}
>> +
>>  		/*
>>  		 * When turning on, we need to retry for 1ms to give the sink
>>  		 * time to wake up.
>> @@ -4530,6 +4539,23 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
>>  	}
>>  }
>>  
>> +static void
>> +intel_edp_init_source_oui(struct intel_dp *intel_dp)
>> +{
>> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>> +	u8 oui[] = { 0x00, 0xaa, 0x01 };
>> +	u8 buf[3] = { 0 };
>> +
>> +	if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
>> +		drm_err(&i915->drm, "Failed to read source OUI\n");
>> +
>> +	if (memcmp(oui, buf, sizeof(oui)) == 0)
>> +		return;
>> +
>> +	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
>> +		drm_err(&i915->drm, "Failed to write source OUI\n");
>> +}

Maybe add this function with a parameter to force write or write only if
necessary, and call from both places that set source OUI?

>> +
>>  static bool
>>  intel_edp_init_dpcd(struct intel_dp *intel_dp)
>>  {
>> @@ -4607,6 +4633,12 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
>>  	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
>>  		intel_dp_get_dsc_sink_cap(intel_dp);
>>  
>> +	/*
>> +	 * Program our source OUI so we can make various Intel-specific AUX
>> +	 * services available (such as HDR backlight controls)
>> +	 */
>> +	intel_edp_init_source_oui(intel_dp);
>
> I believe we should restrict this to the supported platforms: cfl, whl, cml, icl, tgl
> no?

Mmh, this just exposes sink behaviour that I think can be supported by
any platform. I don't understand the notion of "supported platforms"
here.

>
>> +
>>  	return true;
>>  }
>>  
>> -- 
>> 2.26.2
>> 
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-- 
Jani Nikula, Intel Open Source Graphics Center