[PATCH] drm/vc4: hvs: Pull the state of all the CRTCs prior to PV muxing

[Maxime Ripard]

On Fri, Sep 18, 2020 at 03:52:55PM +0100, Dave Stevenson wrote:
> Hi Maxime
> 
> On Thu, 17 Sep 2020 at 13:16, Maxime Ripard <maxime at cerno.tech> wrote:
> >
> > The vc4 display engine has a first controller called the HVS that will
> > perform the composition of the planes. That HVS has 3 FIFOs and can
> > therefore compose planes for up to three outputs. The timings part is
> > generated through a component called the Pixel Valve, and the BCM2711 has 6
> > of them.
> >
> > Thus, the HVS has some bits to control which FIFO gets output to which
> > Pixel Valve. The current code supports that muxing by looking at all the
> > CRTCs in a new DRM atomic state in atomic_check, and given the set of
> > contraints that we have, assigns FIFOs to CRTCs or reject the mode
> 
> s/contraints/constraints

Oops, thanks

I've fixed it while applying it

Maxime
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