[PATCH RFC v7 5/6] dt-bindings: display: add Unisoc's mipi dsi&dphy bindings

Kevin Tang kevin3.tang at gmail.com
Mon Sep 28 11:29:01 UTC 2020


Hi maxime,
Sorry, I forgot to describe ports subnode with my two port at X, i will be fix it.

Thanks for reminding

Maxime Ripard <maxime at cerno.tech> 于2020年9月28日周一 下午4:20写道:
>
> Hi!
>
> On Mon, Sep 28, 2020 at 02:27:39PM +0800, Kevin Tang wrote:
> > From: Kevin Tang <kevin.tang at unisoc.com>
> >
> > Adds MIPI DSI Master and MIPI DSI-PHY (D-PHY)
> > support for Unisoc's display subsystem.
> >
> > RFC v7:
> >   - Fix DTC unit name warnings
> >   - Fix the problem of maintainers
> >
> > Cc: Orson Zhai <orsonzhai at gmail.com>
> > Cc: Chunyan Zhang <zhang.lyra at gmail.com>
> > Signed-off-by: Kevin Tang <kevin.tang at unisoc.com>
> > ---
> >  .../display/sprd/sprd,sharkl3-dsi-host.yaml        | 98 ++++++++++++++++++++++
> >  .../display/sprd/sprd,sharkl3-dsi-phy.yaml         | 75 +++++++++++++++++
> >  2 files changed, 173 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
> >  create mode 100644 Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-phy.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
> > new file mode 100644
> > index 0000000..b6bbf67
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/display/sprd/sprd,sharkl3-dsi-host.yaml
> > @@ -0,0 +1,98 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/display/sprd/sprd,sharkl3-dsi-host.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: Unisoc MIPI DSI Controller
> > +
> > +maintainers:
> > +  - Kevin Tang <kevin.tang at unisoc.com>
> > +
> > +properties:
> > +  compatible:
> > +    const: sprd,sharkl3-dsi-host
> > +
> > +  reg:
> > +    maxItems: 1
> > +    description:
> > +      Physical base address and length of the registers set for the device.
> > +
> > +  interrupts:
> > +    maxItems: 2
> > +    description:
> > +      Should contain DSI interrupt.
> > +
> > +  clocks:
> > +    minItems: 1
> > +
> > +  clock-names:
> > +    items:
> > +      - const: clk_src_96m
> > +
> > +  power-domains:
> > +    maxItems: 1
> > +    description: A phandle to DSIM power domain node
> > +
> > +  "#address-cells":
> > +    const: 1
> > +
> > +  "#size-cells":
> > +    const: 0
> > +
> > +  port at 0:
> > +    type: object
> > +    description:
> > +      A port node with endpoint definitions as defined in
> > +      Documentation/devicetree/bindings/media/video-interfaces.txt.
> > +      That port should be the input endpoint, usually coming from
> > +      the associated DPU.
> > +  port at 1:
> > +    type: object
> > +    description:
> > +      A port node with endpoint definitions as defined in
> > +      Documentation/devicetree/bindings/media/video-interfaces.txt.
> > +      That port should be the output endpoint, usually output to
> > +      the associated DPHY.
>
> Is there a specific reason you don't follow the OF-graph and have a
> ports subnode with your two port at X in there?
>
> Maxime


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