[PATCH] dt-bindings: Fix 'reg' size issues in zynqmp examples

Michal Simek michal.simek at xilinx.com
Tue Sep 29 16:21:06 UTC 2020



On 29. 09. 20 16:55, Rob Herring wrote:
> On Tue, Sep 29, 2020 at 1:55 AM Michal Simek <michal.simek at xilinx.com> wrote:
>>
>> Hi Rob,
>>
>> On 28. 09. 20 17:59, Rob Herring wrote:
>>> The default sizes in examples for 'reg' are 1 cell each. Fix the
>>> incorrect sizes in zynqmp examples:
>>>
>>> Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.example.dt.yaml: example-0: dma-controller at fd4c0000:reg:0: [0, 4249616384, 0, 4096] is too long
>>>       From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
>>> Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.example.dt.yaml: example-0: display at fd4a0000:reg:0: [0, 4249485312, 0, 4096] is too long
>>>       From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
>>> Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.example.dt.yaml: example-0: display at fd4a0000:reg:1: [0, 4249526272, 0, 4096] is too long
>>>       From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
>>> Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.example.dt.yaml: example-0: display at fd4a0000:reg:2: [0, 4249530368, 0, 4096] is too long
>>>       From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
>>> Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.example.dt.yaml: example-0: display at fd4a0000:reg:3: [0, 4249534464, 0, 4096] is too long
>>>       From schema: /usr/local/lib/python3.8/dist-packages/dtschema/schemas/reg.yaml
>>>
>>> Cc: Hyun Kwon <hyun.kwon at xilinx.com>
>>> Cc: Laurent Pinchart <laurent.pinchart at ideasonboard.com>
>>> Cc: Michal Simek <michal.simek at xilinx.com>
>>> Cc: Vinod Koul <vkoul at kernel.org>
>>> Cc: dri-devel at lists.freedesktop.org
>>> Cc: dmaengine at vger.kernel.org
>>> Signed-off-by: Rob Herring <robh at kernel.org>
>>> ---
>>>  .../bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml          | 8 ++++----
>>>  .../devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml | 2 +-
>>>  2 files changed, 5 insertions(+), 5 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml b/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
>>> index 52a939cade3b..7b9d468c3e52 100644
>>> --- a/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
>>> +++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.yaml
>>> @@ -145,10 +145,10 @@ examples:
>>>
>>>      display at fd4a0000 {
>>>          compatible = "xlnx,zynqmp-dpsub-1.7";
>>> -        reg = <0x0 0xfd4a0000 0x0 0x1000>,
>>> -              <0x0 0xfd4aa000 0x0 0x1000>,
>>> -              <0x0 0xfd4ab000 0x0 0x1000>,
>>> -              <0x0 0xfd4ac000 0x0 0x1000>;
>>> +        reg = <0xfd4a0000 0x1000>,
>>> +              <0xfd4aa000 0x1000>,
>>> +              <0xfd4ab000 0x1000>,
>>> +              <0xfd4ac000 0x1000>;
>>>          reg-names = "dp", "blend", "av_buf", "aud";
>>>          interrupts = <0 119 4>;
>>>          interrupt-parent = <&gic>;
>>> diff --git a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml
>>> index 5de510f8c88c..2a595b18ff6c 100644
>>> --- a/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml
>>> +++ b/Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml
>>> @@ -57,7 +57,7 @@ examples:
>>>
>>>      dma: dma-controller at fd4c0000 {
>>>        compatible = "xlnx,zynqmp-dpdma";
>>> -      reg = <0x0 0xfd4c0000 0x0 0x1000>;
>>> +      reg = <0xfd4c0000 0x1000>;
>>>        interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
>>>        interrupt-parent = <&gic>;
>>>        clocks = <&dpdma_clk>;
>>>
>>
>> I would prefer to keep 64bit version.
>> I use this style.
> 
> I prefer to keep the examples simple. The address size is outside the
> scope of the binding.

ok.

Acked-by: Michal Simek <michal.simek at xilinx.com>

Thanks,
Michal



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